A method includes using an analog-to-digital converter (ADC) to provide an entropy signal at an output of the ADC. The method includes controlling a reference signal to the ADC to cause an internal noise level of the ADC to correspond to more than one least significant bit (LSB) of the ADC.

A circuit interrupter includes a sensor structured to output a sensor signal, a control unit structured to receive an external control signal, the control unit including: a communication interface structured to receive the external control signal, and a waveform generator structured to generate a waveform equivalent to the sensor signal in response to the external control, and a signal processing circuit structured to receive and process the sensor signal or the generated waveform and to output the processed sensor signal or generated waveform to the control unit.

A method for generating a pulse signal sequence using a processor unit is provided that allows calibrating a tip timing measurement system in a turbomachine in order to increase operational security and lifespan of the turbomachine. This is achieved by the method having the steps of: storing a number of wait time elements in a memory unit, creating a pulse signal in a signal output unit during at least one processor cycle, reading a wait time element from the memory unit, and creating a null signal in the signal output unit for a number of processor cycles derived from the wait time element read.

The present invention extends to methods, systems, and computing device program products for incrementally calculating simple linear regression coefficients for Big Data or streamed data. Embodiments of the invention include incrementally calculating one or more components of simple linear regression coefficients for a modified computation set based on one or more components of simple linear regression coefficients calculated for a previous computation set and then calculating the simple linear regression coefficients for the modified computation set based on the incrementally calculated components. Incrementally calculating simple linear regression coefficients avoids visiting all data elements in the modified computation set and performing redundant computations thereby increasing calculation efficiency, saving computing resources and reducing computing system's power consumption.

A sampling oscilloscope includes a trigger generation circuit that includes a direct digital synthesizer (DDS) that outputs a trigger clock input in an operable frequency range at an arbitrary output frequency, a band pass filter (BPF) that limits a pass band of the trigger clock output from the direct digital synthesizer and a variable frequency divider that divides a frequency of the trigger clock of which the pass band is limited by the band pass filter, and generates a strobe signal of a frequency at which a sampler can be operated. The sampling oscilloscope includes a controller that calculates a phase shift amount with reference to a pattern cycle of data generated by a one-time strobe signal and adjusts a phase by changing a count value of a phase accumulator of the direct digital synthesizer so that the calculated phase shift amount is eliminated.

A circuit device includes an oscillation circuit which is electrically coupled to a first node to electrically be coupled to one end of a resonator and a second node to electrically be coupled to another end of the resonator, and is configured to oscillate the resonator to generate an oscillation signal, and a waveform shaping circuit which is coupled to the first node, to which the oscillation signal is input from the first node, and which is configured to output a clock signal obtained by performing waveform shaping on the oscillation signal, and a duty adjustment circuit configured to supply the first node with a bias voltage which is variably adjusted based on adjustment data to thereby adjust a duty ratio of the clock signal.

A circuit device includes an oscillation circuit configured to oscillate a resonator to thereby generate an oscillation signal, a waveform shaping circuit to which the oscillation signal is input, and which is configured to output a clock signal obtained by performing waveform shaping on the oscillation signal, a first duty adjustment circuit configured to perform a duty adjustment of the clock signal, and an output buffer circuit configured to output a first output clock signal and a second output clock signal to an outside based on the clock signal. The output buffer circuit includes a second duty adjustment circuit configured to perform a duty adjustment of the second output clock signal.

Methods and apparatus for generating a target signal with desired phase shift information. In embodiments, a system receives an input target signal having a first frequency and combines the input target signal with an oscillator signal to generate a first output signal having a second frequency. The oscillator signal is generated using a digital component that imparts phase-shift information into the oscillator signal. The first output signal is combined with a fixed frequency oscillator signal to generate a second output signal corresponding to a signal reflected from a target.

Provided is a method for managing radio frequency (RF) and ultrasonic signals output by a generator that includes a surgical instrument comprising an RF energy output and an ultrasonic energy output and a circuit configured to receive a combined RF and ultrasonic signal from the generator. The method includes receiving a combined radio frequency (RF) and ultrasonic signal from a generator, generating a RF filtered signal by filtering RF frequency content from the combined signal; filtering ultrasonic frequency content from the combined signal; generating an ultrasonic filtered signal; providing the RF filtered signal to the RF energy output; and providing the ultrasonic filtered signal to the ultrasonic energy output.

An electronic control device includes: a logic circuit for reconfiguring a plurality of arithmetic circuits including a first circuit and a second circuit; a reconfiguration controller that reconfigures the arithmetic circuits and checks the reconfigured arithmetic circuits based on reconfiguration commands; and a process controller that transmits the reconfiguration commands to the reconfiguration controller and instructs the arithmetic unit to execute operations, in which when a first reconfiguration command is received, the reconfiguration controller reconfigures and checks the first circuit, when the check of the first circuit by the reconfiguration controller is completed, the process controller instructs the first circuit to execute an operation, the process controller transmits a second reconfiguration command to the reconfiguration controller and instructs the reconfiguration controller to start to reconfigure the second circuit until the execution of a predetermined process of the first circuit is completed after completion of the reconfiguration of the first circuit.