G06F1/22

Circuit structure for realizing circuit pin multiplexing
12126332 · 2024-10-22 · ·

A circuit structure for realizing circuit pin multiplexing, comprising an MCU module, a temperature sensing circuit and a functional module circuit. The output end of the temperature sensing circuit is connected with an enable signal interface of the MCU module, the output voltage of the temperature sensing circuit is always higher than the threshold voltage of the enable signal, and the MCU module is connected with the functional module circuit. The circuit structure of the present invention realizes the mutual influence of analog signal output and digital signal transmission by designing a temperature sensing output curve, and achieves multi-function multiplexing of a single pin, so that the output of the analog signal and the input of the digital signal can share the pins, it solves the problem of the limitation of the number of pins, and promotes the transmission of the signal and improves the cost performance of the circuit.

Low-pin microcontroller device with multiple independent microcontrollers

A microcontroller device has a housing with a plurality of external pins a first microcontroller with a first central processing unit (CPU), a first system bus coupled with the first CPU, first memory coupled with the first system bus, and a first plurality of peripheral devices coupled with the first system bus, and a second microcontroller with a second central processing unit (CPU), a second system bus coupled with the second CPU, second memory coupled with the second system bus, and a second plurality of peripheral devices coupled with the second system bus, wherein first and second microcontroller communicate only via a dedicated interface.

Low-pin microcontroller device with multiple independent microcontrollers

A microcontroller device has a housing with a plurality of external pins a first microcontroller with a first central processing unit (CPU), a first system bus coupled with the first CPU, first memory coupled with the first system bus, and a first plurality of peripheral devices coupled with the first system bus, and a second microcontroller with a second central processing unit (CPU), a second system bus coupled with the second CPU, second memory coupled with the second system bus, and a second plurality of peripheral devices coupled with the second system bus, wherein first and second microcontroller communicate only via a dedicated interface.

Single wire system clock signal generation
09985778 · 2018-05-29 · ·

This specification describes an integrated circuit comprising: a single wire interface; a clock circuit configured to detect a voltage from the single wire interface and to generate a clock signal having a frequency that is based on the detected voltage; and a digital system coupled with the single wire interface and the clock circuit. The digital system is configured to: receive a data signal from the single wire interface; power the digital system using a power signal from the single wire interface; and perform one or more operations clocked by the clock signal.

Low-Power Type-C Receiver with High Idle Noise and DC-Level Rejection

Techniques for low-power USB Type-C receivers with high DC-level shift tolerance are described herein. In an example embodiment, a USB-enabled device comprises a receiver circuit coupled to a Configuration Channel (CC) line of a USB Type-C subsystem. The receiver circuit is configured to receive data from an incoming signal on the CC line even when the incoming signal has more than 250 mV of DC offset with respect to local ground, and to operate in presence of a VBUS charging current that is specified in a USB-PD specification.

Low-Power Type-C Receiver with High Idle Noise and DC-Level Rejection

Techniques for low-power USB Type-C receivers with high DC-level shift tolerance are described herein. In an example embodiment, a USB-enabled device comprises a receiver circuit coupled to a Configuration Channel (CC) line of a USB Type-C subsystem. The receiver circuit is configured to receive data from an incoming signal on the CC line even when the incoming signal has more than 250 mV of DC offset with respect to local ground, and to operate in presence of a VBUS charging current that is specified in a USB-PD specification.

Device and method to assign device pin functionality for multi-processor core devices
09921988 · 2018-03-20 · ·

An embedded device has a plurality of processor cores, each with a plurality of peripheral devices, wherein each peripheral device may have an output, a housing with a plurality of assignable external pins, and a plurality of peripheral pin selection modules for each processing core, wherein each peripheral pin selection module is configured to be programmable to assign an assignable external pin to one of the plurality of peripheral devices of one of the processor cores.

Device and method to assign device pin functionality for multi-processor core devices
09921988 · 2018-03-20 · ·

An embedded device has a plurality of processor cores, each with a plurality of peripheral devices, wherein each peripheral device may have an output, a housing with a plurality of assignable external pins, and a plurality of peripheral pin selection modules for each processing core, wherein each peripheral pin selection module is configured to be programmable to assign an assignable external pin to one of the plurality of peripheral devices of one of the processor cores.

PIN SHARING CIRCUIT, PIN SHARING METHOD, ELECTRONIC DEVICE AND ELECTRONIC WIRE USING THE SAME
20180074695 · 2018-03-15 ·

Provided herein are a pin sharing circuit, a pin sharing method and an electronic device, an electronic wire using the same. The pin sharing circuit enables at least one pin on an integrated circuit to be shared by a keyboard device and a touch panel and prevents signal interference between the keyboard device and the touch panel using an impedance element disposed on a wire for the pin, such that the pin can output or receive a stimulation signal and a sensor signal that contain both an AC component and a DC component so as to enhance the efficiency of the overall system and prevent the stimulation signal and the sensor signal from conflicts between the keyboard device and the touch panel.

POWER DELIVERY CONTROL MODULE

A power delivery control module includes a first interface, a second interface and a controller. The first interface is configured to be coupled with a first external device. The second interface is configured to be coupled with a second external device. The second interface is a USB Type-C interface, and the first interface is not a USB Type-C interface. The controller is coupled with the first interface and the second interface. Wherein when the first interface is coupled with the first external device and the second interface is coupled with the second external device, the power delivery control module selectively transfers power from the first external device to the second external device or from the second external device to the first external device.