A sampling oscilloscope includes a trigger generation circuit that includes a direct digital synthesizer (DDS) that outputs a trigger clock input in an operable frequency range at an arbitrary output frequency, a band pass filter (BPF) that limits a pass band of the trigger clock output from the direct digital synthesizer and a variable frequency divider that divides a frequency of the trigger clock of which the pass band is limited by the band pass filter, and generates a strobe signal of a frequency at which a sampler can be operated. The sampling oscilloscope includes a controller that calculates a phase shift amount with reference to a pattern cycle of data generated by a one-time strobe signal and adjusts a phase by changing a count value of a phase accumulator of the direct digital synthesizer so that the calculated phase shift amount is eliminated.

A first sequence of data bits is shifted into storage elements of a signal receiver during a first sequence of bit-time intervals, and a memory access command indicates that a second sequence of data bits is to be received within the signal receiver during a second sequence of bit-time intervals. Contents of the shift-register storage elements are conditionally overwritten with a predetermined set of seed bits, depending on whether one or more bit-time intervals will transpire between the first and second sequences of bit-time intervals. Equalization signals generated based, at least in part, on contents of the shift-register storage elements are used to adjust respective signal levels representative of one or more bits of the second sequence of data bits.

A first sequence of data bits is shifted into storage elements of a signal receiver during a first sequence of bit-time intervals, and a memory access command indicates that a second sequence of data bits is to be received within the signal receiver during a second sequence of bit-time intervals. Contents of the shift-register storage elements are conditionally overwritten with a predetermined set of seed bits, depending on whether one or more bit-time intervals will transpire between the first and second sequences of bit-time intervals. Equalization signals generated based, at least in part, on contents of the shift-register storage elements are used to adjust respective signal levels representative of one or more bits of the second sequence of data bits.

A display device may include a display panel, a sensor unit, and a touch driver. The sensor unit is provided on the display panel and may output a sensing signal corresponding to a touch input. The sensor unit may include a first electrode and may include a conductive layer provided between the display panel and the first electrode and spaced from the first electrode. The touch driver may include a signal receiver. The signal receiver may include a first input terminal electrically coupled to the first electrode, may include a second input terminal electrically coupled to the conductive layer, may receive the sensing signal, and may output a signal corresponding to a voltage difference the first input terminal and the second input terminal.

A display device may include a display panel, a sensor unit, and a touch driver. The sensor unit is provided on the display panel and may output a sensing signal corresponding to a touch input. The sensor unit may include a first electrode and may include a conductive layer provided between the display panel and the first electrode and spaced from the first electrode. The touch driver may include a signal receiver. The signal receiver may include a first input terminal electrically coupled to the first electrode, may include a second input terminal electrically coupled to the conductive layer, may receive the sensing signal, and may output a signal corresponding to a voltage difference the first input terminal and the second input terminal.

A microphone assembly includes a housing including a base, a cover, and a sound port. The microphone assembly further includes an acoustic transducer and an electrical circuit, both of which are disposed in an enclosed volume of the housing. The transducer and electrical circuit work in concert to convert sound waves into a processed digital audio signal. The electrical circuit is configured to process digital data in a series of frames that correspond to a fixed period in time. The electrical circuit is further configured to reduce noise in the resulting signal by varying the current draw required in a randomized or pseudo-randomized fashion between adjacent frames of digital data.

An analog-to-digital converter (1) includes an S/H circuit (10) that samples and holds an analog input signal in synchronization with a first sampling clock signal (CLK1), a filter circuit (20) that smooths an output signal of the S/H circuit (10), and an ADC circuit (30) that samples an output signal of the filter circuit (20) in synchronization with a second sampling clock signal (CLK2) different from the first sampling clock signal (CLK1), and outputs a digital signal corresponding to an amplitude of the output signal that is sampled.

An analog-to-digital converter (1) includes an S/H circuit (10) that samples and holds an analog input signal in synchronization with a first sampling clock signal (CLK1), a filter circuit (20) that smooths an output signal of the S/H circuit (10), and an ADC circuit (30) that samples an output signal of the filter circuit (20) in synchronization with a second sampling clock signal (CLK2) different from the first sampling clock signal (CLK1), and outputs a digital signal corresponding to an amplitude of the output signal that is sampled.

Systems and methods for generating virtual reality user interfaces are described. The virtual reality user interface may include a three-dimensional model that simulates an actual environment. In addition, the virtual reality user interface may include a plurality of cells arranged at a simulated depth and with a simulated curvature. Further, the plurality of cells may be divided into a plurality of subcells. The subcells may be sized based at least in part on aspect ratios of images to be included in each of the subcells. Moreover, supplemental cells may be provided around or within the plurality of cells and subcells, each of the supplemental cells representing a collection of items. The variable sizing of the subcells as well as the incorporation of supplemental cells around or within the plurality of cells and subcells may result in a virtual reality user interface with higher user interest and engagement.

Systems and methods for attaching a virtual input device to a virtual object in a mixed reality (MR) environment are provided. The system includes a memory, a processor communicatively coupled to the memory, and a display device. The display device is configured to display a MR environment provided by at least one application implemented by the processor. The mixed reality environment includes a virtual object corresponding to an application, and a virtual input device. The at least one application docks the virtual input device to the virtual object with an offset relative to the virtual object.