Patent classifications
G06F5/01
Computer Processing and Outcome Prediction Systems and Methods
Computer processing and outcome prediction systems and methods used to generate algorithm time prediction polynomials, inverse algorithm time prediction polynomials, determine race conditions, determine when a non-linear algorithm can be treated as if it were linear, as well as automatically generate parallel and quantum solutions from classical software or from the relationship between monotonic attribute values.
MASKED SHIFTED ADD OPERATION
A computer-implemented method includes receiving, by a processing unit, an instruction to perform a masked shift add operation with a set of operands. A logical AND operation is performed on a first pair of operands from the set of operands to obtain a first intermediate result. The first intermediate result is shifted by a first shift amount that is based on a first operand from the first pair of operands. A logical AND operation is performed on a second pair of operands from the set of operands to obtain a second intermediate result. The second intermediate result is shifted by a second shift amount that is based on a first operand from the second pair of operands. The shifted first intermediate result is added with the shifted second intermediate result. The method further includes outputting, as a result of the masked shift add operation, an output of the adding.
MASKED SHIFTED ADD OPERATION
A computer-implemented method includes receiving, by a processing unit, an instruction to perform a masked shift add operation with a set of operands. A logical AND operation is performed on a first pair of operands from the set of operands to obtain a first intermediate result. The first intermediate result is shifted by a first shift amount that is based on a first operand from the first pair of operands. A logical AND operation is performed on a second pair of operands from the set of operands to obtain a second intermediate result. The second intermediate result is shifted by a second shift amount that is based on a first operand from the second pair of operands. The shifted first intermediate result is added with the shifted second intermediate result. The method further includes outputting, as a result of the masked shift add operation, an output of the adding.
Cryptographic Computer Machines with Novel Switching Devices
Operational n-state digital circuits and n-state switching operations with n and integer greater than 2 execute Finite Lab-transformed (FLT) n-state switching functions to process n-state signals provided on at least 2 inputs to generate an n-state signal on an output. The FLT is an enhancement of a computer architecture. Cryptographic apparatus and methods apply circuits that are characterized by FLT-ed addition and/or multiplication over finite field GF(n) or by addition and/or multiplication modulo-n that are modified in accordance with reversible n-state inverters, and are no longer known operations. Cryptographic methods processed on FLT modified machine instructions include encryption/decryption, public key generation, and digital signature methods including Post-Quantum methods. They include modification of isogeny based, NTRU based and McEliece based cryptographic machines.
Low latency matrix multiply unit
Methods, systems, and apparatus for a matrix multiply unit implemented as a systolic array of cells are disclosed. Each cell of the matrix multiply includes: a weight matrix register configured to receive a weight input from either a transposed or a non-transposed weight shift register; a transposed weight shift register configured to receive a weight input from a horizontal direction to be stored in the weight matrix register; a non-transposed weight shift register configured to receive a weight input from a vertical direction to be stored in the weight matrix register; and a multiply unit that is coupled to the weight matrix register and configured to multiply the weight input of the weight matrix register with a vector data input in order to obtain a multiplication result.
COMPUTATION OF NEURAL NETWORK NODE BY NEURAL NETWORK INFERENCE CIRCUIT
Some embodiments provide a neural network inference circuit (NNIC) for executing a neural network that includes multiple computation nodes at multiple layers. The NNIC includes a set of clusters of core computation circuits and a channel, connecting the core computation circuits, that includes separate segments corresponding to each of the clusters. The NNIC includes a fabric controller circuit, a cluster controller circuit for each of the clusters, and a core controller circuit for each of the core computation circuits. The fabric controller circuit receives high-level neural network instructions from a microprocessor and parses the high-level neural network instructions.
ELECTRONIC DEVICE INCLUDING NEURAL PROCESSING UNIT SUPPORTING DIFFERENT DATA TYPES AND METHOD FOR CONTROLLING THE SAME
An operational circuit may include a combiner to combine, based on a request for multiplication of integer numbers different from floating-point numbers, a first integer number and a second integer number. The operational circuit may include a multiplier including first and second ports. A third integer number may be inputted to the first port, and a fourth integer number indicating a combination of the first integer number and the second integer number may inputted to the second port. The operational circuit may include a converter to output, based on a fifth integer number indicating a multiplication of the third integer number and the fourth integer number from a third port of the multiplier, a sixth integer number indicating a multiplication of the first integer number and the third integer number, and a seventh integer number indicating a multiplication of the second integer number and the third integer number.
EMBEDDING OPTIMIZATION FOR MACHINE LEARNING MODELS
Methods, systems, and computer programs are presented for determining parameters of neural networks and selecting embedding dimensions for the feature fields. One method includes an operation for initializing parameters of a neural network and weights for embedding sizes for each feature associated with the neural network. The parameters of the neural network and the weights are iteratively optimized. Each optimization iteration comprises training the neural network with current parameters of the neural network to optimize a value of the weights, and training the neural network with current values of the weights to optimize the parameters of the neural network. Further, the method includes operations for selecting embedding sizes for the features based on the optimized values of the weights, and for training the neural network based on the selected embedding sizes for the features to obtain an estimator model. A prediction is generated utilizing the estimator model.
EMBEDDING OPTIMIZATION FOR MACHINE LEARNING MODELS
Methods, systems, and computer programs are presented for determining parameters of neural networks and selecting embedding dimensions for the feature fields. One method includes an operation for initializing parameters of a neural network and weights for embedding sizes for each feature associated with the neural network. The parameters of the neural network and the weights are iteratively optimized. Each optimization iteration comprises training the neural network with current parameters of the neural network to optimize a value of the weights, and training the neural network with current values of the weights to optimize the parameters of the neural network. Further, the method includes operations for selecting embedding sizes for the features based on the optimized values of the weights, and for training the neural network based on the selected embedding sizes for the features to obtain an estimator model. A prediction is generated utilizing the estimator model.
METHOD FOR CONSTRUCTING MORTON CODES, ENCODER, DECODER, AND STORAGE MEDIUM
Provided are a method for constructing a Morton code, an encoder, decoder and computer storage medium. The encoder determines geometric information of a current point in a point cloud; determines an index value corresponding to a coordinate component according to the coordinate component in the geometric information; determines a Morton code component corresponding to the coordinate component according to the index value and a Morton code lookup table; determines a Morton code of the current point according to the Morton code component. The encoder analyzes a bitstream to determine geometric information of a current point in a point cloud; determines an index value corresponding to a coordinate component according to the coordinate component in geometric information; determines a Morton code component corresponding to the coordinate component according to the index value and a Morton code lookup table; determines a Morton code of the current point according to Morton code component.