Systems and corresponding methods employ an object-oriented (OO) memory (OOM) to effect inter-hardware-client (IHC) communication among a plurality of hardware clients included in same. A system comprises a centralized OOM and the plurality of hardware clients communicate, directly, to the centralized OOM device via OO message transactions. The centralized OOM device effects IHC communication among the plurality of hardware clients based on the OO message transactions. Another system comprises a plurality of OO memories (OOMs) capable of inter-object-oriented-memory-device communication. A hardware client communicates, directly, to a respective OOM device via OO message transactions. The inter-object-oriented-memory-device communication effects IHC communication among the plurality of hardware clients based on the OO message transactions.

An operation method of a storage device configured to communicate with an external device through an interface channel includes receiving an indicator of a first throttling level of a plurality of throttling levels from the external device, setting a first operation parameter based on a throttling predefined table (PDT) including a relationship between the plurality of throttling levels and a plurality of throttling performances, such that the interface channel has a first throttling performance from among the plurality of throttling performances, the first throttling performance corresponding to the first throttling level, receiving a first input/output (I/O) request from the external device through the interface channel having the first throttling performance caused by the setting of the first operation parameter, and processing a first operation corresponding to the first I/O request through the interface channel having the first throttling performance.

An operation method of a storage device configured to communicate with an external device through an interface channel includes receiving an indicator of a first throttling level of a plurality of throttling levels from the external device, setting a first operation parameter based on a throttling predefined table (PDT) including a relationship between the plurality of throttling levels and a plurality of throttling performances, such that the interface channel has a first throttling performance from among the plurality of throttling performances, the first throttling performance corresponding to the first throttling level, receiving a first input/output (I/O) request from the external device through the interface channel having the first throttling performance caused by the setting of the first operation parameter, and processing a first operation corresponding to the first I/O request through the interface channel having the first throttling performance.

An audio processing chip includes a detector circuit, a first-in first-out (FIFO) circuit, and an adjustment circuitry. The detector circuit is configured to detect an audio stream to output an enable signal. The FIFO circuit is configured to start outputting audio data corresponding to a channel in the audio stream to be a first signal. The adjustment circuitry is configured to process the first signal, in order to generate an output signal and transmit the output signal to a speaker.

An audio processing chip includes a detector circuit, a first-in first-out (FIFO) circuit, and an adjustment circuitry. The detector circuit is configured to detect an audio stream to output an enable signal. The FIFO circuit is configured to start outputting audio data corresponding to a channel in the audio stream to be a first signal. The adjustment circuitry is configured to process the first signal, in order to generate an output signal and transmit the output signal to a speaker.

A method for supporting TCM communication by a BIOS of an ARM server, including: setting an access mode of a LPC bus device to a 4-byte mode by means of a BIOS of an ARM server; causing the BIOS to perform data communication with a TCM chip of the LPC bus device in the 4-byte mode; in response to the BIOS reading a register by means of the LPC bus device, determining a type of the register; in response to determining that the type of the register is a specific FIFO register, changing a control register from the 4-byte mode to a single-byte mode, and performing single-byte read-write on the specific FIFO register; and in response to completion of read-write of the specific FIFO register, changing the control register to the 4-byte mode by means of the BIOS, and performing a read-write operation on other FIFO registers.

A method for supporting TCM communication by a BIOS of an ARM server, including: setting an access mode of a LPC bus device to a 4-byte mode by means of a BIOS of an ARM server; causing the BIOS to perform data communication with a TCM chip of the LPC bus device in the 4-byte mode; in response to the BIOS reading a register by means of the LPC bus device, determining a type of the register; in response to determining that the type of the register is a specific FIFO register, changing a control register from the 4-byte mode to a single-byte mode, and performing single-byte read-write on the specific FIFO register; and in response to completion of read-write of the specific FIFO register, changing the control register to the 4-byte mode by means of the BIOS, and performing a read-write operation on other FIFO registers.

Systems and methods are provided for supporting wide-protocol interface across a multi-die interconnect interface. Data signals of a wide-protocol interface are split into a plurality of data streams. A handshake signal is established between a first circuit and a second circuit, whereby the first circuit and second circuit are dies of a multi-die device. The first circuit transmits the plurality of data streams to the second circuit via a plurality of multi-die interconnect channels. Each data stream of the plurality of data streams are compressed based on the handshake signal in order to provide wide-protocol interface with reduced number of required pins.

A method may include receiving, at a storage device, a command using a storage protocol, wherein the storage device is configured to execute a user program, and executing, at the storage device, a device program based on the command. The command may be a first command, and the method may further include receiving, at the storage device, using the storage protocol, a second command, and sending, from the storage device, using the storage protocol, information about the device program based on the second command. The method may further include sending, from the storage device, using the storage protocol, a list of device programs supported by the storage device based on the second command. The method may further include providing, by the storage device, output data from the device program. The providing may include sending, from the storage device, using the storage protocol, a log message.

Embodiments of the invention are directed to a computer-implemented method of operating a data transmission system. The data transmission system includes a transmitter and a receiver. The computer-implemented method includes using the transmitter to send serialized data from the transmitter through a plurality of lanes to the receiver. The transmitter sends the serialized data at a first serialization ratio. The receiver is configured to receive and load the serialized data at a second deserialization ratio, wherein the first serialization ration is greater than the second deserialization ratio.