A first input share value, a second input share value, and a third input share value may be received. The first input share value may be converted to a summation or subtraction between an input value and a combination of the second input share value and the third input share value. A random number value may be generated and combined with the second input share value and the third input share value to generate a combined value. Furthermore, a first output share value may be generated based on a combination of the converted first input share value, the combined value, and additional random number values.

One embodiment provides a processor comprising at least one of a first mask to receive a first input operand and a second input operand and to generate a selected portion of an AND of a sum of the first input operand and the second input operand using an AND chain of the first mask in parallel with generation of the sum by an adder; and a second mask to receive the first input operand and the second input operand and to generate the selected portion of an OR of the sum using an OR chain of the second mask in parallel with generation of the sum.

Systems and methods are delineated in which dynamic thresholds may be employed to detect and provide alerts for potential conflicts between a vehicle and another vehicle, an object or a person in an aircraft environment. Current systems for airport conflict detection and alerting consider one or more alerting boundaries which are independent of the amount of traffic present at any one time or over the course of time. Because nuisance alerts rates depend to a large extent on the amount of traffic, and because alert detection thresholds are often set based on a desire to limit nuisance alerts to a specific threshold, adapting those thresholds based on, among other things, the amount of traffic can result in earlier alerting in some crash scenarios and can even result in providing an alert in a crash scenario where no alert would have otherwise been generated.

A method and corresponding apparatus for processing a shuffle instruction are provided. Shuffle units are configured in a hierarchical structure, and each of the shuffle units generates a shuffled data element array by performing shuffling on an input data element array. In the hierarchical structure, which includes an upper shuffle unit and a lower shuffle unit, the shuffled data element array output from the lower shuffle unit is input to the upper shuffle unit as a portion of the input data element array for the upper shuffle unit.

A method and corresponding apparatus for processing a shuffle instruction are provided. Shuffle units are configured in a hierarchical structure, and each of the shuffle units generates a shuffled data element array by performing shuffling on an input data element array. In the hierarchical structure, which includes an upper shuffle unit and a lower shuffle unit, the shuffled data element array output from the lower shuffle unit is input to the upper shuffle unit as a portion of the input data element array for the upper shuffle unit.

Disclosed are systems and methods for improving interactions with and between computers in a search system supported by or configured with search servers, applications or platforms. The systems interact to identify and retrieve data across platforms, which data can be used to improve the quality of results data used in processing interactions between or among processors in such systems. The disclosed systems and methods provide a novel framework for automatically analyzing items, including real-world items and digital content items, in order to determine their attributes (e.g., characteristics, features, and the like), and based on the determined attributes, generating a user interface (UI) that displays the items and their respective attributes in an interactive, dynamically updatable and searchable multidimensional display.

An electronic device configured to perform polar coding is described. The electronic device includes a bit pattern generator (3403) configured to successively perform a bit pattern generation process over a series (t=┌n/w┐) of clock cycles; and a counter (c, 4203), operably coupled to the bit pattern generator (3403) and configured to count a number of successive bit pattern generation sub-processes over the series (t=┌n/w┐) of clock cycles. The bit pattern generator (3403) is configured to: provide a successive sub-set of (w) bits from a bit pattern vector (b.sub.k,n) in each successive t=┌n/w┐ clock cycle; where the bit pattern vector comprises n bits, of which ‘k’ bits adopt a first binary value and n−k bits adopt a complementary binary value.

An electronic device configured to perform polar coding is described. The electronic device includes a bit pattern generator (3403) configured to successively perform a bit pattern generation process over a series (t=┌n/w┐) of clock cycles; and a counter (c, 4203), operably coupled to the bit pattern generator (3403) and configured to count a number of successive bit pattern generation sub-processes over the series (t=┌n/w┐) of clock cycles. The bit pattern generator (3403) is configured to: provide a successive sub-set of (w) bits from a bit pattern vector (b.sub.k,n) in each successive t=┌n/w┐ clock cycle; where the bit pattern vector comprises n bits, of which ‘k’ bits adopt a first binary value and n−k bits adopt a complementary binary value.

To achieve authentication of devices with higher security.

A system includes: a first device, and a plurality of second devices. The first device transmits a generated confirmation request including first information to the second devices. Each of the second devices performs an arithmetic operation based on the received confirmation request, second information set in common for the second devices, and an arithmetic method specific to each of the second devices, and transmits a confirmation response including a result of the arithmetic operation to the first device. The first device authenticates each of the second devices on the basis of the confirmation response transmitted by each of the second devices.

The present invention relates to a method for securing against N-order side-channel attacks a cryptographic process using in a plurality of encryption rounds an initial Substitution box S.sub.0 comprising the steps of: —generating (E12) a first randomized substitution box S.sub.1 by masking said initial substitution box S.sub.0 such that S.sub.1(x XOR m.sub.1)=S.sub.0(x) XOR m.sub.2, with m.sub.1, m.sub.2 uniformly-distributed random values, for any input value x of the initial substitution box S.sub.0, —generating (E13) a first transrandomized Substitution box S(1,1) from the first randomized substitution box S.sub.1 and from masks m.sub.1,1, m′.sub.1,1 such that S(1, 1)[x]=S.sub.1[x xor (m.sub.1 xor m.sub.1,1)] xor (m.sub.2 xor m′.sub.1,1) for any input value x of the first transrandomized Substitution box S(1,1), —generating (E14) from the first transrandomized Substitution box S(1,1) a N−1th transrandomized Substitution box S(1, N−1) by performing iteratively N−2 times a step of generation of a ith transrandomized Substitution box S(1, i) from a i−1th transrandomized substitution box S(1, i−1) and from a plurality of masks m 1,i, m′.sub.1,i, m.sub.1,i−1, m′.sub.1,i−1 such that S(1, i)[x]=S(1, i−1)[x xor (m.sub.1,i-1 xor m.sub.1,i)] xor (m′.sub.1,i−1 xor m′.sub.1,i) for any input value x of the ith transrandomized substitution box S(1, i), with i an integer comprised in {2, . . . N−1}, —performing the cryptographic process using (E15) the N−1th transrandomized Substitution box S(1, N−1) instead of the initial Substitution box S.sub.0 in at least said first round of the cryptographic process.