For each defect in a set of defects, the defect may be associated with a defect attribute constructed from a set of computer-aided design (CAD) identifiers associated with polygons in an integrated circuit (IC) design that overlap with a defect area of the defect. Next, the set of defects may be segregated into defect groups based on the associated defect attributes. The defect groups may be used to perform additional processing on the set of defects.

A system and method for adding interface protection to an electronic design using parameters. The electronic design and interface protection scheme are defined as parameters. An interface protection model creates interface protection implementation parameters that describe the implementation details of the interface protection. A hardware description model uses the electronic design parameters and the interface protection implementation parameters to create a hardware description. The interface protection scheme can be a built-in protection scheme, a user defined scheme, a scheme that includes place holders that the user may define later, and a combination of the preceding. The interface protection scheme may contain components to help with the retiming of the description of hardware.

A focus identification unit identifies, based on a mathematical model that simulates behavior of a plurality of subsystems constituting a target system, from among the plurality of subsystems, a focus subsystem that causes a large change in an assessment metric of the target system in response to a change in at least one of an operation condition and a maintenance condition. A plan generation unit generates at least one of an operation plan and a maintenance plan such that the assessment metric is optimized with respect to the focus subsystem.

Systems and methods for generating designs in accordance with embodiments of the invention are illustrated. One embodiment includes a method for training a generator to generate designs. The method includes steps for generating a plurality of candidate designs using a generator, evaluating a performance of each candidate design of the plurality of candidate designs, computing a global loss for the plurality of candidate designs based on the evaluated performances, and updating the generator based on the computed global loss.

Systems, computer-implemented methods, and computer program products to facilitate synthesis of a quantum circuit are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a circuit generation component that generates, iteratively, quantum circuits from 1 to N two-qubit gates, wherein at least one or more iterations (1, 2, . . . , N) adds a single two-qubit gate to circuits from a previous iteration based on using added single 2-qubit gates that represent operations distinct from previous operations relative to previous iterations. The computer executable components can further comprise a circuit identification component that identifies, from the quantum circuits, a desired circuit that matches a quantum circuit representation.

A computer-implemented method for probabilistic quantification of probability of failure of a component, especially a gas turbine component, which during operation is subjected to cyclic stress, wherein the component is divided virtually in one or more domains. The method includes: providing or determining for at least one domain, a domain probability density function for crack initiation and providing or determining for the considered domains a domain probability density function for subsequent crack propagation induced failure. Determining for each considered domain a combined domain cumulative distribution function for failure or its probability density function is done by convoluting either both the considered domain probability density functions for crack initiation induced failure and the respective domain probability density function for subsequent crack propagation induced failure, or their integral function. Alternatively, numerical methods for said component failure probabilities include domain-based Monte-Carlo schemes.

Creation and use of a digital twin instance (DTI) for a physical instance of the part. The DTI may be created by a model inversion process such that model parameters are iterated until a convergence criterion related to a physical resonance inspection result and a digital resonance inspection result is satisfied. The DTI may then be used in relation to part evaluation including through simulated use of the part. The physical instance of the part may be evaluated by way of the DTI or the DTI may be used to generate maintenance schedules specific to the physical instance of the part.

A method includes specifying a target memory macro, and determining failure rates of function-blocks in the target memory macro based on an amount of transistors and area distributions in a collection of base cells. The method also includes determining a safety level of the target memory macro, based upon a failure-mode analysis of the target memory macro, from a memory compiler, based on the determined failure rate.

A memory device includes at least one bit line, at least one word line, and at least one memory cell comprising a capacitor and a transistor. The transistor has a gate terminal coupled to the word line, a first terminal, and a second terminal. The capacitor has a first end coupled to the first terminal of the transistor, a second end coupled to the bit line, and an insulating material between the first end and the second end. The insulating material is configured to break down under a predetermined break-down voltage or higher applied between the first end and the second end.

A system and method for detecting, based on a simulation of a build of an object using additive manufacturing, if the build of the object would be flawed or would fail during actual additive manufacturing of the object is provided.