G06G7/12

Buffer circuit, receiver and system using the same
09941868 · 2018-04-10 · ·

A buffer circuit may include an amplification circuit, a main load circuit, and a sub-load circuit. The amplification circuit and the main load circuit may generate first and second output signals by amplifying first and second input signals. The sub-load circuit may compensate mismatch between rising timing and falling timing of the first output signal based on the first input signal.

Sub-harmonic mixer and a method therein for converting radio frequency signals to intermediate frequency signals

A sub-harmonic mixer two or more cascaded stages for converting a Radio Frequency signal to an Intermediate Frequency signal. Each stage comprises a common-emitter transistor or a common-source transistor and each stage having an input and an output, the output of each stage is coupled to the input of a next stage by a capacitor. An Alternating Current choke is coupled at a collector or drain of each transistor. An LO input is coupled to the input of a first stage of the two or more stages; an RF input is coupled to the output of the first stage of the two or more stages; and an IF output is coupled to the output of a last stage of the two or more stages.

Phase shift and attenuation circuits for use with multiple-path amplifiers

Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first circuit and a second circuit in parallel with the first circuit. The first circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output. The second circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output.

System and method for signal read-out using source follower feedback
09866939 · 2018-01-09 · ·

An embodiment amplifier circuit includes a pair of subcircuits that includes a first subcircuit and a second subcircuit, each of which includes a buffer amplifier and a feedback circuit that includes a feedback capacitor. The amplifier circuit also includes a pair of output terminals. The first subcircuit and the second subcircuit each generate a different output signal of a pair of output signals that includes a first output signal and a second output signal. The amplifier circuit is configured for receiving a positive differential input signal at the first subcircuit, receiving a negative differential input signal at the second subcircuit, and receiving the pair of output signals at the pair of output terminals. The amplifier circuit is also configured for transmitting the first output signal to the feedback circuit of the first subcircuit, and transmitting the second output signal to the feedback circuit of the second subcircuit.

Power transmission device and wireless power transmission system

In a power transmission device including a power transmission coil that is disposed to oppose an installation surface of the power transmission device on which a power receiving device is installed and that is capable of being electromagnetically coupled with the power receiving coil. A magnetic substance is disposed at least outside the power transmission coil to oppose the installation surface via the power transmission coil and to be electromagnetically coupled with the power transmission coil. A object detecting circuit detects a metal object existing at least outside the power transmission coil by supplying first AC power to the power transmission coil and detecting a change in at least one of a voltage, a current, and a frequency of the first AC power or a voltage or current of a DC component of the first AC power.

Method and apparatus for metering a voltage signal
09753064 · 2017-09-05 · ·

A voltage metering module for metering a voltage signal at least one analogue to digital converter (ADC) component arranged to receive at an input thereof a voltage signal and to generate a digital signal representative of the received voltage signal. The at least one ADC component includes at least one sampling network controllable to sample the received voltage signal for conversion to a digital signal representative of the received voltage signal and at least one compensation network operably coupled in parallel with the sampling network and controllable to sample the received voltage signal such that an input current of the compensation network at least partially compensates for a component of an input current of the sampling network.

Method and implementation for accurate gain-bandwidth product tuning

Method and implementation of gain-bandwidth product (GWB) tuning are disclosed. In an embodiment an operational amplifier (opamp) includes an input stage of the opamp including a differential device pair coupled to a tail device and configured to be responsive to a differential input signal for conducting a first current and an output stage of the opamp including a class AB interface stage circuit and a pair of output devices connected to the class AB interface stage circuit, wherein a first constant gm bias circuit is coupled to an input terminal of the class AB interface stage circuit.

NONLINEAR FUNCTION OPERATION APPARATUS, SIGMOID FUNCTION OPERATION APPARATUS, HYPERBOLIC TANGENT FUNCTION OPERATION APPARATUS, SOFTMAX FUNCTION OPERATION APPARATUS, AND NONLINEAR FUNCTION OPERATION METHODS

An aspect of the present invention includes: a nonlinear behavior unit configured to autonomously change an internal physical quantity according to a predetermined nonlinear characteristic; an input converting unit configured to convert an input signal into temporal information using a parameter indicating the predetermined nonlinear characteristic; a controlling unit configured to control the nonlinear behavior unit to start, after initializing the nonlinear behavior unit, a change in the internal physical quantity of the nonlinear behavior unit when the input signal is inputted to the input converting unit, and to stop, after an elapse of the temporal information, the change in the internal physical quantity of the nonlinear behavior unit; an arithmetic operation result output unit configured to output the internal physical quantity at a time when the change in the internal physical quantity is stopped as an arithmetic operation result of a nonlinear function having the predetermined nonlinear characteristic.

Power amplification module

Provided is a power amplification module that includes: a first transistor, a first signal being inputted to a base thereof; a second transistor, the first signal being inputted to a base thereof and a collector thereof being connected to a collector of the first transistor; a first resistor, a first bias current being supplied to one end thereof and another end thereof being connected to the base of the first transistor; a second resistor, one end thereof being connected to the one end of the first resistor and another end thereof being connected to the base of the second transistor; and a third resistor, a second bias current being supplied to one end thereof and another end thereof being connected to the base of the second transistor.

Power amplification module
09647700 · 2017-05-09 · ·

A power amplification module includes a first amplification transistor that receives a first signal outputs an amplified second signal from the collector thereof; and a bias circuit that supplies a bias current to the base of the first amplification transistor. The first bias circuit includes a first transistor that is diode connected and is supplied with a bias control current; a second transistor that is diode connected, the collector thereof being connected to the emitter of the first transistor; a third transistor, the base thereof being connected to the base of the first transistor, and the bias current being output from the emitter thereof; a fourth transistor, the collector thereof being connected to the emitter of the third transistor and the base thereof being connected to the base of the second transistor; and a first capacitor between the base and the emitter of the third transistor.