Techniques for computing matrix operations for arbitrarily large matrices on a finite-sized hybrid analog-digital matrix processor are described. Techniques for gain adjustment in a finite-sized hybrid analog-digital matrix processor are described which enable the system to obtain higher energy efficiencies, greater physical density and improved numerical accuracy. In some embodiments, these techniques enable maximization of the predictive accuracy of a GEMM-based convolutional neural network using low-precision data representations.

A technique includes providing a first set of values to a memristor crossbar array and using the memristor crossbar array to perform a Fourier transformation. Using the memristor crossbar array to perform the Fourier transform includes using the array to apply a Discrete Fourier Transform (DFT) to the first set of values to provide a second set of values.

An ultrasonic computation apparatus includes first and second ultrasonic transducer arrays arranged on opposing ends thereof, and further comprises first and second ultrasonic propagation regions arranged between the first and second ultrasonic transducer arrays and proximate respective ones of the first and second ultrasonic transducer arrays, and an intermediate computational structure arranged between the first and second ultrasonic propagation regions. Respective first and second input signals applied to respective ones of the first and second ultrasonic transducer arrays cause propagation of corresponding ultrasonic waves through the respective first and second ultrasonic propagation regions towards the intermediate computational structure. The intermediate computational structure is configured to receive the propagating ultrasonic waves from the respective first and second ultrasonic propagation regions and to generate from the received propagating ultrasonic waves an additional signal that is a function of the first and second signals.

Techniques for computing matrix operations for arbitrarily large matrices on a finite-sized hybrid analog-digital matrix processor are described. Techniques for gain adjustment in a finite-sized hybrid analog-digital matrix processor are described which enable the system to obtain higher energy efficiencies, greater physical density and improved numerical accuracy. In some embodiments, these techniques enable maximization of the predictive accuracy of a GEMM-based convolutional neural network using low-precision data representations.

A two input time domain correlator may perform analog correlation. In order to achieve high throughput rates with reduced or minimal computational overhead, the input data streams may be hard limited through adaptive thresholding to yield two binary bit streams. Correlation may be achieved through the use of a Hamming distance calculation, where the distance between the two bit streams approximates the time delay that separates them. The resulting Hamming distance approximates the correlation time delay with high accuracy.

Certain aspects of the present disclosure provide techniques for processing machine learning model data with a machine learning task accelerator, including: configuring one or more signal processing units (SPUs) of the machine learning task accelerator to process a machine learning model; providing model input data to the one or more configured SPUs; processing the model input data with the machine learning model using the one or more configured SPUs; and receiving output data from the one or more configured SPUs.