Patent classifications
G06N10/70
Apparatus and method for quantum performance and/or error correction enhancement using multi-qubit gates
Apparatus and method for replacing portions of a quantum circuit with multi-qubit gates. For example, one embodiment of an apparatus comprises: a quantum circuit analyzer to evaluate an original quantum circuit specification including one or more sub-circuits of the original quantum circuit specification, the quantum circuit analyzer to generate results of the evaluation; a quantum circuit generator to generate a new quantum circuit specification based on the results of the evaluation generated by the quantum circuit analyzer, the quantum circuit generator to generate the new quantum circuit specification by, at least in part, replacing the one or more sub-circuits of the original quantum circuit specification with one or more multi-qubit gates.
Reducing parasitic interactions in a qubit grid
Methods, systems, and apparatus for performing an entangling operation on a system of qubits. In one aspect, a method includes operating the system of qubits, wherein the system of qubits comprises: a plurality of first qubits, a plurality of second qubits, a plurality of qubit couplers defining nearest neighbor interactions between the first qubits and second qubits, wherein the system of qubits is arranged as a two dimensional grid and each qubit of the multiple first qubits is coupled to multiple second qubits through respective qubit couplers, and wherein operating the system of qubits comprises: pairing multiple first qubits with respective neighboring second qubits; performing an entangling operation on each paired first and second qubit in parallel, comprising detuning each second qubit in the paired first and second qubits in parallel.
Quantum computing devices with Majorana Hexon qubits
Various embodiments of a modular unit for a topologic qubit and of scalable quantum computing architectures using such modular units are disclosed herein. For example, one example embodiment is a modular unit for a topological qubit comprising 6 Majorana zero modes (MZMs) on a mesoscopic superconducting island. These units can provide the computational MZMs with protection from quasiparticle poisoning. Several possible realizations of these modular units are described herein. Also disclosed herein are example designs for scalable quantum computing architectures comprising the modular units together with gates and reference arms (e.g., quantum dots, Majorana wires, etc.) configured to enable joint parity measurements to be performed for various combinations of two or four MZMs associated with one or two modular units, as well as other operations on the states of MZMs.
METHOD FOR ENCODED DIAGNOSTICS IN A FUNCTIONAL SAFETY SYSTEM
A method includes, storing a set of valid codewords including: a first valid functional codeword representing a functional state of a controller subsystem; a first valid fault codeword representing a fault state of the controller subsystem and characterized by a minimum hamming distance from the first valid functional codeword; a second valid functional codeword representing a functional state of a controller; and a second valid fault codeword representing a fault state of the controller; in response to detecting functional operation of the controller subsystem, storing the first valid functional codeword in a first memory; in response to detecting a match between contents of the first memory and the first valid functional codeword, outputting the second valid functional codeword; in response to detecting a mismatch between contents of the first memory and every codeword in the first set of valid codewords, outputting the second valid fault codeword.
Reducing Errors with Circuit Gauge Selection
Systems and methods for quantum error mitigation are provided. A method can include accessing a quantum system; implementing a plurality of quantum circuits; obtaining a plurality of measurements performed for each of the quantum circuits; determining an estimated average value of an observable of interest (O).sub.f for the quantum circuits based at least in part on the plurality of measurements; and determining an estimated noiseless value of an observable of interest (O).sub.ψ based at least in part on the estimated average value of the observable of interest (O).sub.f using a single-point full depolarizing error model. Each of the plurality of quantum circuits can be implemented by a different sequence of quantum gates as compared to each of the other quantum circuits in the plurality to thereby implement one or more circuit gauges and can be an equivalent logical operation as each of the other quantum circuits in the plurality.
Reducing Errors with Circuit Gauge Selection
Systems and methods for quantum error mitigation are provided. A method can include accessing a quantum system; implementing a plurality of quantum circuits; obtaining a plurality of measurements performed for each of the quantum circuits; determining an estimated average value of an observable of interest (O).sub.f for the quantum circuits based at least in part on the plurality of measurements; and determining an estimated noiseless value of an observable of interest (O).sub.ψ based at least in part on the estimated average value of the observable of interest (O).sub.f using a single-point full depolarizing error model. Each of the plurality of quantum circuits can be implemented by a different sequence of quantum gates as compared to each of the other quantum circuits in the plurality to thereby implement one or more circuit gauges and can be an equivalent logical operation as each of the other quantum circuits in the plurality.
Frequency Configuration in Quantum Gates for Leakage Removal
A quantum computing system configured for removal of leakage states can include quantum hardware including a first qubit and a second qubit, wherein the first qubit is configured to have a first transition frequency and wherein the second qubit is configured to have a second transition frequency, the first transition frequency being greater than the second transition frequency. The quantum computing system can include one or more quantum control devices configured to control operation of at least the first qubit and the second qubit, wherein the one or more quantum control devices are configured to implement a quantum gate operation on the first qubit and the second qubit based at least in part on the first transition frequency and the second transition frequency, and wherein the one or more quantum control devices are configured to periodically reset a quantum state of the first qubit.
COMPRESSING DIAGONAL CLIFFORD GATES
Embodiments of the present disclosure include systems and methods for magic state distillation. A first matrix is generated based on a collection of indices that reference a second matrix. A set of compressed Clifford gates is determined based on the first matrix. The set of compressed Clifford gates is applied to a set of the qubits of a quantum processor. A set of magic states of the quantum processor are obtained as a result of application of the set of compressed Clifford gates. The quantum processor may be configured based on the magic states obtained.
QUANTUM COMPUTING DEVICE AND METHOD OF MITIGATING DETECTION CROSSTALK
A quantum computing device performs quantum pre-processing on a plurality of qubits, performs measurements on the plurality of qubits on which the quantum pre-processing is performed, and performing classical post-processing on a measurement outcome of the plurality of qubits to mitigate a detection crosstalk included in the measurement outcome.
QUANTUM COMPUTING DEVICE AND METHOD OF MITIGATING DETECTION CROSSTALK
A quantum computing device performs quantum pre-processing on a plurality of qubits, performs measurements on the plurality of qubits on which the quantum pre-processing is performed, and performing classical post-processing on a measurement outcome of the plurality of qubits to mitigate a detection crosstalk included in the measurement outcome.