An automatic brightness adjustment for devices with displays includes the capability to assess ambient light. The assessment may be made using circuitry, such as a light meter circuit, by exploiting exposure control circuitry, or using other approaches. The ambient light value is sent to a brightness adjustment driver, which may employ a look-up table to keep track of brightness adjustments for particular ambient conditions. The look-up table may include distinct adjustment values.

A signal processing device includes a converter and a selector. The converter converts an input video signal into the output video signal for the low-brightness display device. The selector selects one of the input video signal and the output video signal, and outputs the selected video signal to the display. The selector selects the output video signal in a case where a high-brightness flag indicating a video signal for a high-brightness display device is added to the input video signal, and the selector selects the input video signal in a case where the high-brightness flag is not added to the input video signal.

A signal processing device includes a converter and a selector. The converter converts an input video signal into the output video signal for the low-brightness display device. The selector selects one of the input video signal and the output video signal, and outputs the selected video signal to the display. The selector selects the output video signal in a case where a high-brightness flag indicating a video signal for a high-brightness display device is added to the input video signal, and the selector selects the input video signal in a case where the high-brightness flag is not added to the input video signal.

A signal processing device includes a converter and a selector. The converter converts an input video signal into the output video signal for the low-brightness display device. The selector selects one of the input video signal and the output video signal, and outputs the selected video signal to the display device. The selector selects the output video signal in a case where a high-brightness flag indicating a video signal for the high-brightness display device is added to the input video signal, and where information indicating that the display device is the low-brightness display device is acquired or information indicating that the display device is the high-brightness display device is not acquired, and selects the input video signal in a case where the high-brightness flag is not added to the input video signal.

A display device includes: a display unit including pixels including a first color subpixel at a left upper end, a second color subpixel at a left lower end, and a third color subpixel at a right side; a data converter to convert first color, second color, and third color unit input data into first color, second color, and third color unit adapted data; and a driver to apply an image signal to the pixel based on the adapted data, the data converter generating unit adapted data using first unit input data of a target subpixel and second unit input data of another subpixel adjacent the target subpixel along a direction, the direction being: an up direction when the target subpixel is the first color subpixel; a down direction when the target subpixel is the second color subpixel; and a right direction when the target subpixel is the third color subpixel.

A ramp signal generating circuit and ramp signal generator, an array substrate and a display apparatus. The ramp signal generating circuit comprises a first shift register (11), a second shift register (12), a voltage decreasing unit (13) and a sampling unit (14); the voltage decreasing unit (13) is connected to a first power supply input terminal, a second power supply input terminal and a ground terminal and is configured to continuously decrease a voltage inputted from the first power supply input terminal and a voltage inputted from the second power supply input terminal stage by stage; the first shift register (11) is connected to the voltage decreasing unit (13) and is configured to control the voltage decreasing unit (13) to output voltages which are decreased continuously stage by stage; the sampling unit (14) has an output terminal and is connected to the voltage decreasing unit (13); the second shift register (12) is connected to the sampling unit (14) and is configured to control the sampling unit (14) to sample and output the voltages which are decreased continuously stage by stage and outputted by the voltage decreasing unit (13). Such ramp signal generating circuit is capable of reducing area of the ramp signal generating circuit and improving linearity of ramp signal.

A ramp signal generating circuit and ramp signal generator, an array substrate and a display apparatus. The ramp signal generating circuit comprises a first shift register (11), a second shift register (12), a voltage decreasing unit (13) and a sampling unit (14); the voltage decreasing unit (13) is connected to a first power supply input terminal, a second power supply input terminal and a ground terminal and is configured to continuously decrease a voltage inputted from the first power supply input terminal and a voltage inputted from the second power supply input terminal stage by stage; the first shift register (11) is connected to the voltage decreasing unit (13) and is configured to control the voltage decreasing unit (13) to output voltages which are decreased continuously stage by stage; the sampling unit (14) has an output terminal and is connected to the voltage decreasing unit (13); the second shift register (12) is connected to the sampling unit (14) and is configured to control the sampling unit (14) to sample and output the voltages which are decreased continuously stage by stage and outputted by the voltage decreasing unit (13). Such ramp signal generating circuit is capable of reducing area of the ramp signal generating circuit and improving linearity of ramp signal.

The present invention relates to a digital display plotter for plotting images on a digital display device 18. A cursive imagery generator 12 generates imagery inputs at a plurality of respective update phases during a refresh period of the display device. A control 20 for the display device activates selected pixels of the digital display device in response to respective said imagery inputs, activation being controlled subsequent to each update phase during a refresh period. An input store 14, 16 associates each cursively generated imagery input with an update phase that the imagery input was generated during a refresh period. The control 20 is responsive to the input store and configured to deactivate the selected pixels activated in response to each imagery input dependent on the associated update phase of each imagery input.

An image drawing method, a display apparatus, and a storage medium, relates to the technical field of display. The method comprises: determining a gray-scale value of each of a plurality of target-pixels in a displayed image; determining a pixel quantity in each preset gray-scale level according to the gray-scale value of each of the plurality of target-pixels; representing a maximum quantity of a plurality of pixel quantities by a first numeral system, to read values in a preset digit range of the digit of the first numeral system corresponding to the maximum quantity, determining a proportional coefficient corresponding to the values, and according to a height of a histogram to be drawn, a gray-scale to be drawn and the proportion coefficient, drawing the histogram.

A bi-directional full-duplex lock system applied in a data transmission interface of a liquid crystal display is disclosed. The data transmission interface includes a transmitter and a receiver. The bi-directional full-duplex lock system includes a detection module and a control module. The detection module detects a transmitter link state of transmitter and a receiver link state of receiver respectively. The control module controls transmitter to transmit a lock signal to receiver, controls receiver to transmit the lock signal to transmitter, and controls one receiver to transmit the lock signal to another receiver. The lock signal relates to transmitter link state and receiver link state. When transmitter transmits the lock signal to receiver, a phase of the lock signal will be reversed for the receiver to detect whether its own frequency is correct.