A display device includes: a substrate including a first pixel area, a second pixel area having a smaller area than the first pixel area and connected to the first pixel area, and a peripheral area surrounding the first pixel area and the second pixel area; a first pixel provided in the first pixel area and a second pixel provided in the second pixel area; a first line connected to the first pixel and a second line connected to the second pixel; a dummy part disposed in the peripheral area, overlapping at least one of the first line and the second line and providing a parasitic capacitance that compensates for a difference in a load value between the first line and the second line; and a power supply line provided in the first and second pixel areas. The dummy part includes an insulating layer having at least one contact hole.

An object of the present invention is to decrease the resistance of a power supply line, to suppress a voltage drop in the power supply line, and to prevent defective display. A connection terminal portion includes a plurality of connection terminals. The plurality of connection terminals is provided with a plurality of connection pads which is part of the connection terminal. The plurality of connection pads includes a first connection pad and a second connection pad having a line width different from that of the first connection pad. Pitches between the plurality of connection pads are equal to each other.

An electrowetting system is disclosed. The system includes electrodes configured to manipulate droplets of fluid in a microfluidic space. Each electrode is coupled to circuitry operative to selectively apply a driving voltage to the electrode. The system includes a dielectric stack including a first dielectric pair comprising a first layer having a first dielectric constant and a second layer having a second dielectric constant. The second dielectric constant is larger than the first dielectric constant. The dielectric stack includes a second dielectric pair comprising a third layer having a third dielectric constant and a fourth layer having a fourth dielectric constant. The fourth dielectric constant is larger than the third dielectric constant. A ratio of a thickness of the fourth layer to a thickness of the third layer (T.sub.4:T.sub.3) is in the range from about 2:1 to about 8:1. The second dielectric pair is thinner than the first dielectric pair.

The disclosure is related to creating different functional micro devices by integrating functional tuning materials and creating an encapsulation capsule to protect these materials. Various embodiments of the present disclosure also related to improve light extraction efficiencies of micro devices by mounting micro devices at a proximity of a corner of a pixel active area and arranging QD films with optical layers in a micro device structure.

A signal line capacitance compensation circuit and a display panel are provided, a signal line capacitance compensation circuit includes: a plurality of signal lines; at least one control line, a compensation capacitor being provided between the control line and at least one of the plurality of signal lines; and a signal source configured to send a charging signal to one or more control lines of the at least one control line, the charging signal being used to charge the compensation capacitor between the one or more control lines receiving the charging signal and the at least one signal line.

An array substrate, a display panel and a detection method are provided. The array substrate includes a plurality of display pixels and at least one detection element. When an aging process is performed on the plurality of display pixels, a first driving signal is applied on the at least one detection element and the at least one detection element changes from a first state to a second state, wherein the second state is different from the first state. The second state of the at least one detection element indicates that the plurality of display pixels has undergone the aging process.

An operational amplifier includes an input stage with a first main input unit, a first auxiliary input unit, a second main input unit and a second auxiliary input unit, an amplification stage with a first current mirror receiving currents from the first main input unit and the first auxiliary input unit, and a second current mirror receiving currents from the second main input unit and the second auxiliary input unit, an output stage receiving voltages from the first current mirror and the second current mirror, a voltage storage unit storing an intermediate voltage based on an output signal generated by the output stage during at least one of a first operation period and a second operation period, and a switching unit that differently controls a first feedback path between the output stage and the input stage and a second feedback path between the output stage to the voltage storage unit in accordance with the first operation period and the second operation period.

A stage circuit including: a first sub-stage circuit coupled to a first input terminal receiving an input signal, a second input terminal receiving a first clock signal, and a third input terminal receiving a second clock signal, the first sub-stage circuit controlling a voltage of a first node, a second node, and a third node based on the input signal and the first and second clock signals, and supplying a first scan signal to a first output terminal based on the voltage of the second and third nodes; and a second sub-stage circuit coupled to the second input terminal, a fourth input terminal receiving a third clock signal, and the first and second nodes, the second sub-stage circuit supplying a second scan signal to a second output terminal based on the first and third clock signal, and the voltage of the first and second nodes.

A replica pixel for testing a display IC that includes a driving circuit that drives a display panel and a sensing circuit that senses a received current is presented. The replica pixel includes a replica pixel transistor, which has a first terminal switchably coupled to a power source, a gate coupled to a first node of a capacitor, and a second terminal coupled to a second node of the capacitor. The first node of the capacitor is switchably coupled to a reference voltage Vref. The second node of the capacitor is switchably coupled to a coupling node, wherein the coupling node selectively couples to either the driving circuit or the sensing circuit. The replica pixel is approximately a real pixel without the display element, and may be used to test the display IC without assembling the display IC with a display panel.

A display device includes: a substrate including a first pixel area, a second pixel area having a smaller area than the first pixel area and connected to the first pixel area, and a peripheral area surrounding the first pixel area and the second pixel area; a first pixel provided in the first pixel area and a second pixel provided in the second pixel area; a first line connected to the first pixel and a second line connected to the second pixel; a dummy part disposed in the peripheral area, overlapping at least one of the first line and the second line and providing a parasitic capacitance that compensates for a difference in a load value between the first line and the second line; and a power supply line provided in the first and second pixel areas. The dummy part includes an insulating layer having at least one contact hole.