According to one embodiment, a display device includes a display region where pixels are arranged. Each of the pixels includes a pixel electrode, a light emitting element, a drive transistor, a first capacitance electrode layer opposed to the pixel electrode and held at a constant potential, and an insulating layer forming an auxiliary capacitance together with the pixel electrode and the first capacitance electrode layer. A value of the auxiliary capacitance of the first pixel, of the values of the auxiliary capacitance of the pixels is the largest.

An array substrate and a display device. The array substrate includes a base substrate, a first electrode, a first insulating layer and a second electrode. The first electrode is on the base substrate; the first insulating layer is on a side of the first electrode away from the base substrate; the second electrode is on a side of the first insulating layer away from the first electrode. The second electrode is provided with a first through-hole and a slit communicated with the first through-hole and extending from the first through-hole to an edge of the second electrode, and an orthographic projection of the first electrode on the base substrate completely falls within an orthographic projection of the second electrode, the first through-hole and the slit on the base substrate. At this time, the first electrode, the second electrode, and the first insulating layer can constitute a capacitor.

A display device includes a display panel which displays an image, a data driver which supplies a plurality of data signals to the display panel, a first power supply which supplies a data driving voltage to the data driver through a first power supply line, and a second power supply which supplies a first driving voltage to the display panel through a second power supply line. The first power supply senses a voltage of the second power supply line and controls the supply of the data driving voltage based on a sensed voltage during an initial driving period, in which the first power supply generates the data driving voltage and the second power supply does not generate the first driving voltage.

The present disclosure provides a gate driver on array (GOA) circuit and a display panel. The GOA circuit includes multi-level cascaded GOA units. Each of the GOA units includes a pull-up control module, a pull-up module, a pull-down module, a pull-down maintenance module and a bootstrap capacitor. By sharing part of the circuit, each of the GOA units can realize multi-level scanning signal outputting, which simplifies the structure of the GOA circuit and further realizes a narrow frame design of display panels.

The present disclosure provides a gate driver on array (GOA) circuit and a display panel. The GOA circuit includes multi-level cascaded GOA units. Each of the GOA units includes a pull-up control module, a pull-up module, a pull-down module, a pull-down maintenance module and a bootstrap capacitor. By sharing part of the circuit, each of the GOA units can realize multi-level scanning signal outputting, which simplifies the structure of the GOA circuit and further realizes a narrow frame design of display panels.

According to one embodiment, a display device includes a first common electrode and a second common electrode arranged in a first direction, a first switch unit selectively supplying a first drive signal or a second drive signal different from the first drive signal to the first common electrode, and a second switch unit selectively supplying the first drive signal or the second drive signal to the second common electrode, wherein the second common electrode and the first switch unit are arranged in a second direction intersecting the first direction, the first switch unit comprises a first switch circuit and a second switch circuit arranged in the second direction.

A display apparatus capable of performing authentication in a short time is provided. The display apparatus includes a first display portion where first pixels are arranged in a matrix, a second display portion where second pixels are arranged in a matrix, first and second row driver circuits, and a control circuit. Each of the first and the second pixels includes a light-receiving element. The first and the second pixels each have a function of acquiring imaging data by using the light-receiving element. The first and the second row driver circuits each have a function of selecting the first and the second pixels which read out the imaging data. The control circuit has a function of sequentially driving the first and the second row driver circuits in a first mode, and has a function of driving one of the first and the second row driver circuits on the basis of the imaging data in the second mode. Each of the scan rates of the first and the second row driver circuits in the first mode is higher than the scan rate of the first or the second row driver circuit in the second mode.

There are provided methods for driving an electro-optic display having a plurality of display pixels, a such method includes receiving an image, converting the image into a YCbCr image; and processing the YCbCr image to generate a luma image. The method further includes calculating variations in a local area for the YCbCr image to obtain a variation map, and calculating an effect ratio map using the calculated variation.

The present embodiments disclose a pixel driving circuit and a display device including the same. A pixel driving circuit according to an embodiment of the present disclosure includes a first pixel circuit configured to control light-emission and non-emission of the luminous element in response to a control signal applied to each of a plurality of subframes constituting a frame during a light-emitting period and a second pixel circuit storing a bit value of image data in a data writing period and generating the control signal based on the bit value and a clock signal in the light-emitting period.

A light-emitting diode (LED) package includes a first LED pixel including a plurality of first LED chips and a first pixel driving integrated circuit to drive the first LED chips according to an active matrix (AM) mode using entirety of a first frame period, wherein the first pixel driving integrated circuit includes a first storage area configured to store first frame data of each first LED chip, a second storage area configured to store duty ratio compensation data of each first LED chip, a pulse width modulation (PWM) data calculator configured to perform an arithmetic operation on the first frame data and the duty ratio compensation data to generate PWM data, and a PWM data generator configured to adjust an emission duty ratio based on the PWM data.