According to one embodiment, a display device includes a first common electrode and a second common electrode arranged in a first direction, a first switch unit selectively supplying a first drive signal or a second drive signal different from the first drive signal to the first common electrode, and a second switch unit selectively supplying the first drive signal or the second drive signal to the second common electrode, wherein the second common electrode and the first switch unit are arranged in a second direction intersecting the first direction, the first switch unit comprises a first switch circuit and a second switch circuit arranged in the second direction.

Provided are a display panel and display device. The display panel includes a driver circuit comprising a shift register that is N-stage cascaded, wherein N is a number greater than or equal to 2; where the shift register comprises: a third control unit configured to receive a first voltage signal and generate an output signal in response to a signal of a third node, or receive a second voltage signal and generate an output signal in response to a signal of a second node; and a fourth control unit comprising a first capacitor, a first transistor and a second transistor, where a second plate of the first capacitor is connected to a drain of the first transistor, a source of the second transistor is connected to a first node, and a drain of the second transistor is connected to the third node.

A method for driving electro-optic displays including electro-optic material disposed between a common electrode and a backplane. The backplane includes an array of pixel electrodes, each coupled to a transistor. A display controller applies waveforms to the pixel electrodes. The method includes applying first measurement waveforms to a first portion of the pixel electrodes. During each frame of the first measurement waveforms, the same time-dependent voltages are applied to each pixel electrode of the first portion of pixel electrodes. The method includes determining the impedance of the electro-optic material in proximity to the first portion of pixel electrodes based on a measurement of the current flowing through a current measurement circuit and the time-dependent voltages applied to each pixel electrode during the first measurement waveforms, and selecting driving waveforms based on the impedance of the electro-optic material in proximity to the first portion of pixel electrodes.

A touch display device is disclosed. The touch display device includes a substrate, a scan line, a data line, a scan signal line, a thin film transistor, a touch signal line and a touch electrode. The scan line, the data line, the scan signal line, the thin film transistor, the touch signal line and the touch electrode are disposed on the substrate. An extending direction of the scan line is different from an extending direction of the data line, and the scan line and the data line are electrically connected to the thin film transistor. An extending direction of the scan signal line is different from the extending direction of the scan line, and the scan signal line is electrically connected to the scan line. The touch signal line is electrically connected to the touch electrode.

A display device with low power consumption is provided. A display device having high visibility regardless of the ambient brightness is provided. The display device includes a light-receiving element, a display element, a first transistor, and a second transistor. One of a source and a drain of the first transistor is electrically connected to one electrode of the light-receiving element. The one of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the second transistor. The display device has a function of, by turning on the second transistor, changing the gray level of the display element in accordance with the amount of light detected by the light-receiving element.

A device includes a matrix of active pixels, with each active pixel having an OLED diode having a cathode to receive a cathode voltage, and a control circuit coupled to an anode of the OLED diode. The device also includes at least one dummy pixel having a dummy OLED diode having a cathode to receive the cathode voltage, and an anode, and a dummy control circuit coupled to the anode of the OLED diode and having a power supply terminal. The dummy OLED diode and the dummy control circuit are substantially similar to the OLED diode and the control circuit. First regulation circuitry is configured to deliver a reference current to the power supply terminal to thereby generate a voltage, and second regulation circuitry is configured to regulate the cathode voltage so as to maintain the voltage at the power supply terminal at a given level.

A display apparatus including a panel substrate, and a light emitting source disposed on the panel substrate, in which the light emitting source includes a substrate, an electrode disposed on the substrate, a light emitting structure disposed on the electrode and having an n-type semiconductor layer, a p-type semiconductor layer, an n-type electrode, and a p-type electrode, a transparent electrode disposed on the light emitting structure, and an adhesive layer disposed on the light emitting structure, the n-type electrode is electrically connected to the electrode, the p-type electrode is electrically connected to the transparent electrode, and the adhesive layer is disposed between the p-type electrode and the transparent electrode.

There is provided a gate driving circuit comprising N first shift registers arranged alternately with N second shift registers. An input signal terminal of an n-th stage of first shift register is coupled to an output signal terminal of an (n−i)-th stage of first shift register, and a reset signal terminal of the n-th stage of first shift register is coupled to an output signal terminal of an (n+j)-th stage of first shift register. Input signal terminal and reset signal terminal of n-th stage of second shift register are coupled to output signal terminals of (n−i)-th and (n+j)-th stages of second shift registers respectively. K=6, i=3, and j=4. Reset signal terminals of (N−j+1)-th to N-th stages of first shift registers and reset signal terminals of (N−j+1)-th to N-th stages of second shift registers are configured to receive a total reset signal.

A method of driving an electro-optic display including a layer of electro-optic material disposed between a common electrode and a backplane including an array of pixel electrodes, each coupled to a transistor including a source, gate, and drain electrode. The gate electrode is coupled to a gate line, the source electrode is coupled to a scan line, and the drain electrode is coupled to the pixel electrode. A controller provides time-dependent voltages to the gate, scan, and common electrodes, including a common electrode that is the maximum voltage the controller is capable of applying, and a scan line voltage to every pixel that is the maximum voltage the controller is capable of applying. A gate voltage sufficient to activate the pixel transistor to the gate of every pixel transistor is applied, thereby applying voltage potential across the electro-optic material.

A sub-pixel circuit, and an active electroluminescence display and a driving method thereof are provided. The sub-pixel circuit includes at least one electroluminescence device, and at least one first driving transistor or at least one second driving transistor and at least one third driving transistor coupled with the at least one electroluminescence device. A cathode of the electroluminescence device is coupled with a power source, an anode of the electroluminescence device is coupled with an output terminal of the first driving transistor, an input terminal of the first driving transistor is coupled with a signal line, and a control terminal of the first driving transistor is coupled with a scan line. Alternatively, the anode of the electroluminescence device is coupled with an output terminal of the second driving transistor, an input terminal of the second driving transistor is coupled with an output terminal of the third driving transistor.