The present disclosure discloses a driving method and apparatus of a display panel. When each of a plurality of obtained display frames is transmitted, only display data, corresponding to each pixel in one row group, in the display frame of image data is transmitted to a driving chip in the display panel, so that the driving chip in the display panel drives the display panel to display an image according to the received display data. Therefore, when a system on chip transmits each of the plurality of obtained display frames, only the display data, corresponding to each pixel in one row group, in the display frame of image data is transmitted to the driving chip in the display panel.

A display device includes a timing controller, a scan driver, a data driver, and a display unit. The timing controller generates a clock signal, a start signal, and image data. The scan driver includes a plurality of stages for sequentially outputting the clock signal as a scan signal in response to the start signal. The data driver generates a data signal using the image data. The display unit includes pixels for emitting light with a luminance corresponding to the data signal in response to the scan signal. The timing controller performs masking on the clock signal in a part of a first frame period during which the scan driver sequentially outputs the scan signal.

A scan driving circuit includes: a driving circuit configured to output a scan signal to an output terminal in response to clock signals and a carry signal; and a masking circuit configured to stop the driving circuit from outputting the scan signal in response to a masking signal and a signal indicating an operating state of the driving circuit.

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for driving a display with an array of light-emitting pixels. The pixels are arranged in a plurality of rows. The array includes two or more independently drivable areas. Each area includes two or more adjacent rows. The method includes, during an image frame, while operating in a first mode of operation, activating a first shift register circuit addressing only rows of pixels in a first area of the independently drivable areas. Activating the first register circuit illuminates one or more pixels in the first area. The method also includes, during the image frame, while operating in the first mode of operation, deactivating a second shift register circuit addressing only rows of pixels in a second area of the independently drivable areas. Deactivating the second register circuit maintains every pixel in the second area unilluminated during the image frame.

A color electrophoretic display that includes sets of duplicative waveforms to reduce visible artifacts during image updates. Such methods include driving extra pixels where the boundary between a driven and undriven area would otherwise lead to artifact by providing paired sets of driving instructions, allowing the undriven area to be driven while maintain the desired (undriven) optical state.

An electronic apparatus includes: a display control unit configured to display an input image, a first GUI image, and a second GUI image at a display; a first detecting unit configured to detect a position of a predetermined object in the input image; and a second detecting unit configured to detect a viewpoint of a user in the input image, wherein the display control unit displays the first GUI image in a position corresponding to the position of the predetermined object detected by the first detecting unit and the second GUI image in a position corresponding to the viewpoint detected by the second detecting unit, and in a case where the first GUI image and the second GUI image overlap, the display control unit makes the second GUI image less noticeable than in a case where the first GUI image and the second GUI image do not overlap.

A display device includes a plurality of pixels arranged in m rows and n columns, where the pixels receive write scan signals, data voltages and compensation scan signals, a plurality of write scan lines which provides the write scan signals to the pixels, a plurality of data lines which provides the data voltages to the pixels, and a plurality of compensation scan lines which provides the compensation scan signals to the pixels, wherein in h-th to p-th frames, the data voltages are applied to pixels arranged in first to i-th rows, and in h-th to (h+k)-th frames, the data voltages are applied to pixels of a row unit by increasing sequentially the number of the row unit to which the data voltages are applied in at least one row unit from an i-th row to an (i+1)-th row.

A display apparatus includes circuitry to display, on a display, an image including a table, receive an operation of specifying a range to be edited in the image, acquire coordinates of lines of the table in the range, and change a color of pixels other than pixels corresponding to the lines in the range to a predetermined color.

Technology for a display source device is described. The display source device can receive a frame start indication from a display panel at a start of a frame. The display source device can align a timing of the display source device to a timing of the display panel based on the frame start indication received from the display panel to obtain frame-level synchronization between the display source device and the display panel. The display source device can send one or more frame update regions to the display panel in accordance with the timing of the display source device that is aligned to the timing of the display panel.

A scan driver includes: a first transistor having a first electrode coupled to an output scan line, a second electrode coupled to a first power line, and a gate electrode coupled to a first node; a second transistor having a first electrode coupled to a first clock line, a second electrode coupled to the output scan line, and a gate electrode coupled to a second node; a third transistor having a first electrode coupled to the first node, a second electrode coupled to a first input scan line, and a gate electrode coupled to a second clock line; and a fourth transistor having a first electrode coupled to the second node and a second electrode and a gate electrode, which are coupled to a second input scan line, wherein the first input scan line and the second input scan line are different from each other.