Patent classifications
G09G2310/06
POWER MANAGEMENT INTEGRATED CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME
The present disclosure relates to a power management circuit including a multiplexer and a power converter, and can provide technology that implements a multiplexer selecting and outputting input power to the power management circuit and a power converter controlling input voltage of a timing controller as one integrated circuit.
COORDINATED TOP ELECTRODE - DRIVE ELECTRODE VOLTAGES FOR SWITCHING OPTICAL STATE OF ELECTROPHORETIC DISPLAYS USING POSITIVE AND NEGATIVE VOLTAGES OF DIFFERENT MAGNITUDES
A system for simplified driving of electrophoretic media using a positive and a negative voltage source, where the voltage sources have different magnitudes, and a controller that cycles the top electrode between the two voltage sources and ground while coordinating driving at least two drive electrodes opposed to the top electrode. The resulting system can achieve roughly the same color states as compared to supplying each drive electrode with six independent drive levels and ground. Thus, the system simplifies the required electronics with only marginal loss in color gamut. The system is particularly useful for addressing an electrophoretic medium including four sets of different particles, e.g., wherein three of the particles are colored and subtractive and one of the particles is light-scattering.
CIRCUIT OF CONTROLLING COMMON VOLTAGE OF LIQUID CRYSTAL PANEL
A voltage control circuit provides a common voltage to a common electrode of a liquid crystal panel. The liquid crystal panel includes pixel units, each of which is coupled to the common electrode. The circuit includes an operational amplifier in a negative feedback configuration. The operational amplifier includes: an input stage, a gain stage and an output stage including a second NMOS transistor and a second PMOS transistor. A gate of the second NMOS transistor receives a first control signal, and a drain and a source of the second NMOS transistor are respectively coupled to a gate of a first PMOS transistor and a second reference voltage. A gate of the second PMOS transistor receives a second control signal, and a drain and a source of the second PMOS transistor is respectively coupled to a gate of a first NMOS transistor and a third reference voltage.
DISPLAY DEVICE FOR LOW POWER DRIVING AND METHOD OF OPERATING THE SAME
A display device includes a display panel, a display driver integrated circuit and a driving control circuit. The display panel includes a plurality of pixels connected to a plurality of driving lines and a plurality of source lines. The display driver integrated circuit includes a driving control signal generator. The driving control signal generator generates a driving control signal based on display device information and pixel values corresponding to at least a portion of the plurality of rows among a plurality of previous pixel values of a previous frame and a plurality of present pixel values of a present frame. The driving control circuit selectively connects the display driver integrated circuit with each of the plurality of driving lines based on the driving control signal such that first driving signals provided to first driving lines among the plurality of driving lines are blocked.
DISPLAY PANEL AND DISPLAY DEVICE
Provided are a display panel and a display device. The display panel includes a gate drive circuit, a plurality of impedance regulation circuits and a control module. The gate drive circuit includes a plurality of cascaded first shift registers. The plurality of cascaded first shift registers are electrically connected to a plurality of scanning lines in one to one correspondence; and the plurality of impedance regulation circuits are in one-to-one correspondence with the plurality of scanning lines. Each of the plurality of impedance regulation circuits is in series connection between a first shift register corresponding to the each of the plurality of impedance regulation circuits and a scanning line corresponding to the each of the plurality of impedance regulation circuits. The each of the plurality of impedance regulation circuits includes at least one transistor.
HANDWRITTEN READING DEVICE, REPORT POINT DATA PROCESSING METHOD THEREOF, AND COMPUTER STORAGE MEDIUM
The present disclosure discloses a method for processing a report point data, a handwriting reading device and a computer storage medium. The method for processing the report point data includes: transmitting report point data associated with received handwriting to a display controller by a System on Chip; looking up a LUT table and acquiring a first waveform of driving an ink screen based on the report point data by the display controller; and driving the ink screen to display the handwriting using the first waveform by the display controller.
DRIVING CIRCUIT
A driving circuit includes a driving transistor, a capacitor, a reset circuit, a touch sensing electrode, a sensing circuit, and a read circuit. The capacitor is electrically coupled to a gate terminal of the driving transistor. The reset circuit is electrically coupled to the gate terminal of the driving transistor, and the reset circuit is configured to reset the voltage level of the gate terminal of the driving transistor. The sensing circuit is electrically coupled between the touch sensing electrode and the gate terminal of the driving transistor, and the sensing circuit is configured to transmit the voltage level of the touch sensing electrode to the gate terminal of the driving transistor. The read circuit is electrically coupled to the driving transistor, and the read circuit is configured to output a touch sensing signal according to the voltage level of the gate terminal of the driving transistor.
Techniques to compensate for flicker at low refresh rates
Certain embodiments are directed to techniques (e.g., a method, an apparatus, and non-transitory computer readable medium storing code or instructions executable by one or more processors) for mitigating the flicker on the displays at low driving frequencies due to drops of the voltage holding ratio of the materials for the display. The techniques to compensate for flicker in a liquid crystal display can include generating a dynamic waveform for the backlight of the display. The dynamic waveform can be synchronized with the driving rate of the liquid crystal display such that the luminosity of the backlight increases during periods when the voltage-holding ratio drops in the materials of the display. In this way, a liquid crystal material can be utilized in a display to generate reduced power consumption with liquid crystal rate minimizing the flicker in response to the drops of the voltage-holding ratio.
GATE DRIVER AND DISPLAY DEVICE COMPRISING SAME
According to an aspect of the present disclosure, there is provided a display device including a display panel where a plurality of unit pixels are disposed, a gate driver disposed on an upper surface of the display panel and integrated in the plurality of unit pixels. Each of the plurality of unit pixels includes a main pixel and a redundancy pixel, and the gate driver supplies a gate voltage to the main pixel and the redundancy pixel. even if the main pixel becomes defective, the redundancy pixel can emit light instead of the main pixel, so that the reliability of the display device is improved.
Display apparatus
A display apparatus is provided to include a pixel array composed of a plurality of pixels. Each pixel includes a pulse-generating unit producing a first pulse and a second pulse with opposite phases; a first switching unit; a light-emitting unit; and a second switching unit. The first switching unit, the light-emitting unit, and the second switching unit are connected in series, the first switching unit is controlled by the first pulse, and the second switching unit is controlled by the second pulse, and the first switching unit and the second switching unit are configured to be turned on or turned off synchronously.