An organic light emitting display device may include a display panel, a power supply, and a display driver. The display panel may comprise a plurality of scan lines, a plurality of data lines, and a plurality of pixels connected to the scan lines and to the data lines. The power supply may supply a first pixel voltage and a second pixel voltage to the pixels. The display driver may control the display panel. The display panel may display a first image in a first frame frequency during a first driving mode, and display a second image in a second frame frequency that is lower than the first frame frequency during a second driving mode, according to a control by the display driver

A power supplying structure for a transparent liquid crystal display device attached to a glass slide window which has a window glass and a first frame surrounding the window glass; the glass slide window is disposed in a window frame; in which a display area of the transparent liquid crystal display device overlaps the window glass; an external dimension of the display area of the transparent liquid crystal display device is smaller than an external dimension of the window glass; a light source for supplying light to the display area, a terminal area of the transparent liquid crystal display device, a wiring substrate, and a cable connected to the wiring substrate are housed in the first frame; the cable is connected to a receiving terminal formed in the frame; the receiving terminal can be connected to a power supplying terminal; the power supplying terminal is connected to a power source.

A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, including a pixel array region and a peripheral region; and a first scan driving circuit, a plurality of power lines, a first signal line group, and a second signal line group, which are in the peripheral region and located on a first side of the base substrate. The first scan driving circuit includes a plurality of cascaded first shift registers; the plurality of power lines are configured to provide a plurality of power voltages to the plurality of cascaded first shift registers in the first scan driving circuit; the first signal line group includes at least one timing signal line; and the second signal line group is on a side of the plurality of power lines and the first signal line group away from the pixel array region.

An electronic device having a novel structure is provided. A battery is provided in each component of an electronic device, whereby the electronic device includes two batteries. The electronic device including the two batteries and a display portion that can be called a flexible display and has a plurality of foldable portions is provided as a novel device.

A display device includes a first pixel area having first pixels and a second pixel area having second pixels. Each first pixel includes a driving transistor initialized to a voltage of a first initialization power supply. Each second pixel includes a driving transistor initialized to a voltage of a second initialization power supply. The first initialization power supply and the second initialization power supply are set to different voltages. The first pixel area and the second pixel area have different widths.

This application discloses a method for controlling a timing controller chip of a display panel and the display panel. The method includes steps of: outputting a write protection level to a write protection pin; detecting an actual level value of the write protection pin; and controlling whether to read an initialization configuration code according to a comparison result of the actual level value with the write protection level.

A pixel including: a light emitting element; a first transistor between a first node and the light emitting element to control current flowing from a first driving power source through the light emitting element to a second driving power source; a second transistor between a data line and the first transistor, and tamed on by a first scan signal; a third transistor between the first transistor and first node, and turned on by the first scan signal; and a fourth transistor between an initialization power line and the first node, and turned on by a second scan signal, wherein the fourth transistor is a tunneling field effect transistor including a source and drain area that are spaced apart from each other and have opposite conductivities, a channel area between the source area and drain area, and a gate electrode on the channel area with a gate insulating layer therebetween.

A display device includes: a display region; and a frame region disposed around the display region. The frame region partly includes a terminal section, wherein the frame region includes a main-power-source-voltage stem wire and an auxiliary-power-source-voltage stem wire. The frame region includes a first frame region having the terminal section, and a second frame region located opposite the first frame region with reference to the display region. The main-power-source-voltage stem wire has a potential different from a potential of the auxiliary-power-source-voltage stem wire, and the main-power-source-voltage stem wire and the auxiliary-power-source-voltage stem wire are electrically connected together.

A power supply unit adapts based on an image to be displayed by a display panel. The power supply unit includes a controller circuit for generating a control signal, and a converter circuit for generating an output supply voltage based on the control signal. The controller circuit includes a first look-up table (LUT) storing a set of lower limit values, and a second LUT storing a set of upper limit values. Moreover, the controller circuit includes a microcontroller for receiving an on-pixel-ratio (OPR) value and identifying an entry in the first LUT and the second LUT from the received OPR value. The controller circuit further includes an output circuit for generating the control signal between a first voltage corresponding to a lower limit stored in the identified entry in the first LUT and a second voltage corresponding to an upper limit stored in the identified entry in the second LUT.

The present disclosure provides a display substrate, a method for driving the same, and a display device. The display substrate includes: a plurality of sub-pixels, a plurality of reset signal lines, a plurality of gate lines, a plurality of light emitting control signal lines, a plurality of data lines, a power signal line structure, an initialization signal line structure, and at least part of the reset signal lines extend along the first direction; the plurality of reset signal lines include a sub-reset signal line corresponding to each sub-pixel, and the sub-reset signal line includes a first reset pattern and a second reset pattern that are coupled to each other, the first reset pattern is located between the substrate of the display substrate and the second reset pattern.