The present disclosure relates to the field of display, and proposes a display device and a display system. The display device comprises a display panel, a first processor, a second processor, a first signal transceiver, and a second signal transceiver. The first processor is electrically connected to the display panel, and is configured to process multimedia files. The second processor is electrically connected to the display panel, and is configured to process communication data, control instructions, and feedback information. The second processor is electrically connected to the first processor. The first signal transceiver is electrically connected to the first processor, and is configured to receive the multimedia files. The second signal transceiver is electrically connected to the second processor, and is configured to receive the communication data and the control instructions, as well as to send feedback information.

An apparatus and method for multi-adapter and/or multi-pass encoding on dual graphics processors. For example, one embodiment of a processor comprises: a central processor integrated on a first die, the central processor comprising a plurality of cores to execute instructions and process data; an first graphics processor integrated on the first die, the first graphics processor comprising media processing circuitry to perform one or more preliminary lookahead operations on video content to generate lookahead statistics; an interconnect to couple the first graphics processor to a lookahead buffer, the first graphics processor to transmit the lookahead statistics over the interconnect to the lookahead buffer; wherein the lookahead statistics are to be used by a second graphics processor to encode the video content to generate encoded video.

An apparatus and method are described for allocating local memories to virtual machines. For example, one embodiment of an apparatus comprises: a command streamer to queue commands from a plurality of virtual machines (VMs) or applications, the commands to be distributed from the command streamer and executed by graphics processing resources of a graphics processing unit (GPU); a tile cache to store graphics data associated with the plurality of VMs or applications as the commands are executed by the graphics processing resources; and tile cache allocation hardware logic to allocate a first portion of the tile cache to a first VM or application and a second portion of the tile cache to a second VM or application; the tile cache allocation hardware logic to further allocate a first region in system memory to store spill-over data when the first portion of the tile cache and/or the second portion of the file cache becomes full.

An apparatus and method for multi-adapter and/or multi-pass encoding on dual graphics processors. For example, one embodiment of a processor comprises: a central processor integrated on a first die, the central processor comprising a plurality of cores to execute instructions and process data; an first graphics processor integrated on the first die, the first graphics processor comprising media processing circuitry to perform one or more preliminary lookahead operations on video content to generate lookahead statistics; an interconnect to couple the first graphics processor to a lookahead buffer, the first graphics processor to transmit the lookahead statistics over the interconnect to the lookahead buffer; wherein the lookahead statistics are to be used by a second graphics processor to encode the video content to generate encoded video

A method and an apparatus for channel switching in an interactive smartboard including receiving a channel switching request to switch from a first channel to a second channel; detecting a state of a system associated with the second channel; and when the state of the system associated with the second channel is a sleep state or a dormant state, according to the channel switching request, switching a touch receiving service to the system associated with the second channel and switching a current display from the first channel to the second channel, and waking up the system associated with the second channel.

The liquid crystal display device includes a pixel portion including a plurality of pixels to which image signals are supplied; a driver circuit including a signal line driver circuit which selectively controls a signal line and a gate line driver circuit which selectively controls a gate line; a memory circuit which stores the image signals; a comparison circuit which compares the image signals stored in the memory circuit in the pixels and detects a difference; and a display control circuit which controls the driver circuit and reads the image signal in accordance with the difference. The display control circuit supplies the image signal only to the pixel where the difference is detected. The pixel includes a thin film transistor including a semiconductor layer including an oxide semiconductor.

Methods, systems and apparatuses may provide for technology that detects an immediate flip request associated with a current frame of a video signal and generates a modified frame in response to the immediate flip request, wherein the modified frame includes a plurality of scanlines containing transition content associated with the current frame and the successive frame. The technology may also send the modified frame to the display.

An apparatus and method are described for allocating local memories to virtual machines. For example, one embodiment of an apparatus comprises: a command streamer to queue commands from a plurality of virtual machines (VMs) or applications, the commands to be distributed from the command streamer and executed by graphics processing resources of a graphics processing unit (GPU); a tile cache to store graphics data associated with the plurality of VMs or applications as the commands are executed by the graphics processing resources; and tile cache allocation hardware logic to allocate a first portion of the tile cache to a first VM or application and a second portion of the tile cache to a second VM or application; the tile cache allocation hardware logic to further allocate a first region in system memory to store spill-over data when the first portion of the tile cache and/or the second portion of the file cache becomes full.

The liquid crystal display device includes a pixel portion including a plurality of pixels to which image signals are supplied; a driver circuit including a signal line driver circuit which selectively controls a signal line and a gate line driver circuit which selectively controls a gate line; a memory circuit which stores the image signals; a comparison circuit which compares the image signals stored in the memory circuit in the pixels and detects a difference; and a display control circuit which controls the driver circuit and reads the image signal in accordance with the difference. The display control circuit supplies the image signal only to the pixel where the difference is detected. The pixel includes a thin film transistor including a semiconductor layer including an oxide semiconductor.

A display system comprises a processing circuit configured to receive image data from a video source, and generate a current image frame by generating pixel data as a function of the image data and storing the pixel data to a frame buffer. A graphic video driver is configured to display the image frame by reading the pixel data from the frame buffer and generating drive signals for the graphic display as a function of the pixel data read. The processing circuit also is configured to insert integrity data into the pixel data of the current image frame, wherein the position of the integrity data within the pixel data changes. The display system comprises a further processing circuit configured to read the pixel data from the frame buffer and verify whether the position of the integrity data within the pixel data changes.