A timing controller includes an input signal processor that receives a data enable signal and a frame frequency information signal, generates one of a first internal data enable signal having a first frame frequency and a second internal data enable signal having a second frame frequency, the first and second frame frequencies being selected based on the frame frequency information signal. A gate control signal output unit generates and outputs a first gate control signal based on the first internal data enable signal or a second gate control signal based on the second internal data enable signal. A data control signal output unit generates and outputs a first data control signal based on the first internal data enable signal or a second data control signal based on the second internal data enable signal. The pulse widths of the first and second internal data enable signals are the same.

A method and an apparatus for generating panoramic images are presented. The method includes receiving a set of consecutive image frames. A portion of a first image frame is extracted to configure an intermediate panoramic image. The intermediate panoramic image is augmented by stitching image frame portions to the intermediate panoramic image. The image frame portions are selected from individual image frames in a subset of image frames including consecutive image frames from a second image frame to a penultimate image frame. Each image frame portion is selected based on a sharpness measure and an overlap measure associated with the respective individual image frame. The overlap measure is determined based on a comparison of the respective individual image frame with a current state of the intermediate panoramic image. A portion of a last image frame is stitched to the augmented intermediate panoramic image to configure the panoramic image.

Techniques related to encoding image content for transmission and display via a remote device with improved latency and efficiency are discussed. Such techniques may include skipping one or more of frame capture, encode, packetization, and transmission for a frame based on a skip indicator. One or more selective updates may be captured for the skipped frame and integrated into an encode of a subsequent non-skipped frame, which may be packetized and transmitted for to the remote device for presentment to a user.

A display driver device (210) receives a downloadable “sequence” for dynamically reconfiguring displayed image characteristics in an image system. The display driver device comprises one or more storage devices, for example, memory devices, for storing image data (218) and portions of drive sequences (219) that are downloaded and/or updated in real time depending on various inputs (214).

An address to perform a memory operation on a memory location in a rectangular frame buffer is received. A determination is made whether the received address identifies a memory location in a non-rectangular frame buffer corresponding to a memory location in the rectangular frame buffer. Based on the determination that the received address identifies the memory location in the non-rectangular buffer, the memory operation on the memory location in the non-rectangular buffer is performed based on the translated address. Based on the determination that the received address does not identify the memory location in the non-rectangular buffer, the memory operation in the non-rectangular frame buffer is not performed.

A display controller includes a resource controller configured to receive layer information about each of a first layer and a second layer that are output at different times through a display panel during a unit frame. The display controller includes a data input direct memory access (DMA) configured to receive first image data corresponding to the first layer and second image data corresponding to the second layer, and a hardware resource configured to receive the first and second image data from the data input DMA, process the received first and second image data according to the layer information, and generate first layer data of the first layer and second layer data of the second layer. The resource controller is configured to control the data input DMA according to the layer information to determine an order in which the first and second image data are provided to the hardware resource.

An image processing method of a video device includes storing a plurality of pictures into a buffer, parsing header information of a current image of the plurality of pictures and managing a reference picture list of the current image while the current image is processed by a video engine based on the parsed header information.

An electronic device includes a first graphic composer that composes first graphic data associated with a layer of a first composition type, a second graphic composer that composes second graphic data associated with a layer of a second composition type different from the first composition type. The electronic device also includes a processor that sets a composition type of each of a plurality of layers associated with at least one application to the first or second composition type, composes first graphic data corresponding to a layer set to the first composition type using the first graphic composer, compose the composed graphic data in the frame buffer and second graphic data corresponding to a layer set to the second composition type using the second graphic composer, and display the composed graphic data through a display connected with the electronic device.

The drive control device includes a display control part and a touch control part. The display control part includes a control circuit operable to control first and second frame modes, and a clock pulse generator operable to produce a display line clock signal in synchronization with a display line switching cycle. The control circuit changes display and non-display drive terms in start timing on an individual display frame period basis in the first frame mode. In the second frame mode, each display frame period includes only one display drive term; the display drive term is not interrupted by a non-display drive term halfway. The second frame mode is arranged so that the cycle of the display line clock signal in synchronization with the display line switching cycle is made longer than that in the first frame mode.

Magnetic random access memory (MRAM)-based frame buffering apparatus are provided that may reduce a size and power consumption thereof by using a pixel self-refresh (PSR) method. The MRAM-based frame buffering apparatus includes a frame buffer memory including magnetic random access memory (MRAM). The frame buffer memory stores at least one piece of frame data. The MRAM-based frame buffering apparatus further includes a magnetic field sensor configured to detect an external magnetic field; and a frame buffer controller configured to control the storing of the at least one piece of frame data according to the intensity of the detected external magnetic field.