A semiconductor device includes first and second contact plugs in an insulating layer that is on a substrate, the first and second contact plugs spaced apart from each other. A spin-orbit torque (SOT) line on the insulating layer and overlapping the first and second contact plug is provided. A magnetic tunnel junction (MTJ) is on the SOT line. An upper electrode is on the MTJ. Each of the first and second contact plugs includes a recess region adjacent the SOT line. A sidewall of the recess region is substantially coplanar with a side surface of the SOT line and a side surface of the MTJ.

The disclosed technology relates to a multibit memory cell. In one aspect, the multibit memory cell includes a plurality of spin-orbit torque (SOT) tracks, plurality of magnetic tunnel junctions (MTJs), an electrically conductive path connecting a first MTJ and a second MTJ together, and a plurality of terminals. The plurality of terminals can be configured to provide a first SOT write current to the first MTJ, a second SOT write current to the second MTJ, and at least one of: the second SOT write current to a third MTJ, a third SOT write current to the third MTJ, and a spin transfer torque (STT) write current through the third MTJ. The junction resistances of the various MTJs are such that a combined multibit memory state of the MTJs is readable by a read current through all the MTJs in series.

An ultra-fast magnetic random access memory (MRAM) comprises a three terminal composite SOT magnetic tunneling junction (CSOT-MTJ) element including a magnetic flux guide (MFG) having a very high magnetic permeability, a spin Hall channel (SHC) having a large positive spin Hall angle, an in-plane magnetic memory (MM) layer, a tunnel barrier (TB) layer, and a magnetic pinning stack (MPS) having a synthetic antiparallel coupling pinned by an antiferromagnetic material. The magnetic writing is significantly boosted by a combined effort of enhanced spin orbit torque (SOT) and Lorentz force generated by current-flowing wire (CFW) in the SHC layer and spin transfer torque (STT) by a current flowing through the MTJ stack, and further enhanced by a magnetic close loop formed at the cross section of MFG/SHC/MM tri-layer.

A spin-orbit torque type magnetoresistance effect element including a magnetoresistance effect element having a first ferromagnetic metal layer with a fixed magnetization direction, a second ferromagnetic metal layer with a varying magnetization direction, and a non-magnetic layer sandwiched between the first ferromagnetic metal layer and the second ferromagnetic metal layer; and spin-orbit torque wiring that extends in a first direction intersecting with a stacking direction of the magnetoresistance effect element and that is joined to the second ferromagnetic metal layer; wherein the magnetization of the second ferromagnetic metal layer is oriented in the stacking direction of the magnetoresistance effect element; and the second ferromagnetic metal layer has shape anisotropy, such that a length along the first direction is greater than a length along a second direction orthogonal to the first direction and to the stacking direction.

A spin-orbit torque type magnetoresistance effect element including a magnetoresistance effect element having a first ferromagnetic metal layer with a fixed magnetization direction, a second ferromagnetic metal layer with a varying magnetization direction, and a non-magnetic layer sandwiched between the first ferromagnetic metal layer and the second ferromagnetic metal layer; and spin-orbit torque wiring that extends in a first direction intersecting with a stacking direction of the magnetoresistance effect element and that is joined to the second ferromagnetic metal layer; wherein the magnetization of the second ferromagnetic metal layer is oriented in the stacking direction of the magnetoresistance effect element; and the second ferromagnetic metal layer has shape anisotropy, such that a length along the first direction is greater than a length along a second direction orthogonal to the first direction and to the stacking direction.

A magnetic logic device having two magnetic elements and a conductive element coupled to the two magnetic elements and arranged at least substantially perpendicular to the magnetic elements, wherein the device is configured, for each magnetic element, to have a magnetisation state with a perpendicular easy axis, and to switch the magnetisation state in response to a spin current generated in the magnetic element in response to a write current applied to the magnetic element, and configured to generate, as an output, a Hall voltage across the conductive element in response to a respective read current applied to each magnetic element, wherein a magnitude of the Hall voltage is variable, depending on a direction of the magnetisation state of each magnetic element and a direction of the respective read current applied to each magnetic element, for the device to provide outputs corresponding to one of a plurality of logical operations.

A magnetic logic device having two magnetic elements and a conductive element coupled to the two magnetic elements and arranged at least substantially perpendicular to the magnetic elements, wherein the device is configured, for each magnetic element, to have a magnetisation state with a perpendicular easy axis, and to switch the magnetisation state in response to a spin current generated in the magnetic element in response to a write current applied to the magnetic element, and configured to generate, as an output, a Hall voltage across the conductive element in response to a respective read current applied to each magnetic element, wherein a magnitude of the Hall voltage is variable, depending on a direction of the magnetisation state of each magnetic element and a direction of the respective read current applied to each magnetic element, for the device to provide outputs corresponding to one of a plurality of logical operations.

Embodiments of the invention include a method for fabricating a magnetoresistive random-access memory (MRAM) structure and the resulting structure. A first type of metal is formed on an interlayer dielectric layer with a plurality of embedded contacts, where the first type of metal exhibits spin Hall effect (SHE) properties. At least one spin-orbit torque (SOT) MRAM cell is formed on the first type of metal. One or more recesses surrounding the at least one SOT-MRAM cell are created by recessing exposed portions of the first type of metal. A second type of metal is formed in the one or more recesses, where the second type of metal has lower resistivity than the first type of metal.

A SOT-MRAM cell, comprising at least one magnetic tunnel junction (MTJ) comprising a tunnel barrier layer between a pinned ferromagnetic layer and a free ferromagnetic layer; a SOT line, extending substantially parallel to the plane of the layers and contacting a first end of said at least one MTJ; at least a first source line connected to one end of the SOT line; at least a first bit line and a second bit line, wherein the SOT-MRAM cell comprises one MTJ, each bit line being connected to the other end of the MTJ; or wherein the SOT-MRAM cell comprises two MTJs, each MTJ being connected to one of the first bit line and second bit line.

The disclosure is directed to spin-orbit torque (“SOT”) magnetoresistive random-access memory (“MRAM”) (“SOT-MRAM”) structures and methods. A new structure of the SOT channel has one or more magnetic insertion layers superposed or stacked with one or more heavy metal layer(s). Through proximity to a magnetic insertion layer, a surface portion of a heavy metal layer is magnetized to include a magnetization. The magnetization within the heavy metal layer enhances spin-dependent scattering, which leads to increased transverse spin imbalance.