This disclosed technology relates to a programmable NAND flash memory and a method for operating the NAND flash memory. The method comprises applying a first voltage to the first gate and a pass voltage to one or more word lines to allow charge to inject into the channel layer and form charge packets. Each charge packet can be arranged next to one of the second gates. The method further comprises applying a programming voltage to the word lines to move the charge packets from the channel layer into the memory cells associated with the second gates next to which they are arranged.

As block sizes in NAND memory continue to increase in size and density, in can be useful to access less than all of the block, such as sub-block or subset of the blocks NAND strings, in order to reduce read disturbs, reduce power consumption, and increase operating speeds. Although this sort of separation of sub-block can be achieved by independently biasable select gates, the sort of select gate structure can face processing difficulties, particularly at the source side of three dimensional NAND structures. To avoid these difficulties while still providing individually selectable sub-blocks, the following introduces word line based selectors, where multiple word lines of a blocks are programmed with different sets of threshold voltages, allowing them to be biased for individual access of sub-blocks.

Provided is a method for operating a program of a three-dimensional flash memory. A program voltage has a value obtained by adding a step voltage to a previous program voltage applied in a previous program operation, and the step voltage is increased as a program operation is repeated. Also, the program operation is performed on a target memory cell by applying a negative voltage to a bit line of a selected cell string and applying the program voltage to a selected word line. In addition, tunneling oxide-charge trap nitride-blocking oxide (ONO) formed surrounding a vertical channel pattern is included, and at least one of a tunneling oxide layer or a blocking oxide layer of the ONO is formed of a ferroelectric material.

A memory device applies voltage to drain select lines, which are determined individually. A program operation control unit applies a precharge voltage to a drain select line coupled to a cell string selected from the first cell string and the second cell string before a program voltage is applied to the word line, during a time determined depending on a resistance value of the drain select line coupled to the selected cell string.