Patent classifications
G01R17/105
Semiconductor testkey pattern and test method thereof
The invention provides a semiconductor testkey pattern, the semiconductor testkey pattern includes a high density device region and a plurality of resistor pairs surrounding the high density device region, wherein each resistor pair includes two mutually symmetrical resistor patterns.
Four-terminal-pair alternating current quantum resistance dissemination bridge and related method
A four-terminal-pair AC quantum resistance dissemination bridge and related methods are provided. The bridge includes: a supply transformer IVD1, a Kelvin branch A1, a Wagner branch A0, the first and second current sources A2, A3, an injection inductive voltage divider A4, a ratio transformer IVD2, the first and second four-terminal AC resistor connection points Z1, Z2, chokes H, and null indicators D. An isolated inductive winding LO is wound along the ratio transformer IVD2 and supplies excitation current to primary winding of injection inductive voltage divider A4 to avoid the mutual influence among various balance networks and rapid balance of the bridge can be realized. By changing turn ratio of primary winding L3 and secondary winding L4 of the second inductive voltage divider T2, the phase shift can be realized through only one set of capacitors for imaginary part error compensation, the bridge with multiple frequency points can be obtained.
Dual free layer TMR magnetic field sensor
The present disclosure generally relates to a Wheatstone bridge that includes a plurality of resistors comprising dual free layer (DFL) TMR structures. The DFL TMR structures include one or more hard bias structures on the side of DLF. Additionally, one or more soft bias structures may also be present on a side of the DFL. Two resistors will have identical hard bias material while two other resistors will have hard bias material that is identical to each other, yet different when compared to the first two resistors. The hard bias materials will provide opposite magnetizations that will provide opposite bias fields that result in two different magnetoresistance responses for the DFL TMR.
Magnetic sensor with serial resistor for asymmetric sensing field range
The present disclosure generally relates to a Wheatstone bridge that has four resistors. Each resistor includes a plurality of tunneling magnetoresistance (TMR) structures. Two resistors have identical TMR structures. The remaining two resistors also have identical TMR structures, though the TMR structures are different from the other two resistors. Additionally, the two resistors that have identical TMR structures each have an additional non-TMR resistor as compared to the remaining two resistors that have identical TMR structures. Therefore, the working bias field for the Wheatstone bridge is non-zero.
MEASUREMENT CIRCUITRY
Circuitry for measuring a characteristic of an electrochemical cell, the circuitry comprising: a comparator having a first comparator input, a second comparator input and a comparator output; a feedback path between the comparator output and the second comparator input configured to provide a feedback signal to the second comparator input; and a loop filter configured to apply filtering to the feedback path to generate the feedback signal, wherein the loop filter comprises the electrochemical cell.
AC impedance measurement circuit with calibration function
The present invention discloses an AC impedance measurement circuit with a calibration function, which is characterized in that only one calibration impedance is needed, associated with a switch circuit. Based on the measurement results of the two calibration modes, an equivalent impedance of the switch circuit, circuit gain and phase offset can be calculated. Based on the above results, the equivalent impedance of the internal circuit is deducted from the measurement result of the measurement mode to accurately calculate an AC conductance and a phase of the AC conductance for impedance to be measured. In addition, by adjusting a phase difference between an input sine wave signal and a sampling clock signal, impedance of the same phase and impedance of the quadrature phase can be obtained, respectively, and the AC impedance and phase angle of the impedance to be measured can be calculated.
DISTRIBUTED INSULATION DETECTION DEVICE FOR MULTI-STAGE DC SYSTEM
Provided is a distributed insulation detection device for a multi-stage DC system. A basic insulation combination module is configured to detect a ground insulation fault of the multi-stage DC system, a sampling module is configured to collect voltage data and/or leakage current data of the multi-stage DC system, to transmit the collected voltage data and/or the leakage current data to an intelligent control module for data processing, to control a resistance value of the basic insulation combination module and a resistance value of an intelligent resistance switching network module, so as to adjust a total balance resistance of the distributed insulation detection device for the multi-stage DC system.
Magnetic sensor array with one TMR stack having two free layers
The present disclosure generally relates to a Wheatstone bridge array comprising TMR sensors and a method of fabrication thereof. In the Wheatstone bridge array, there are four distinct TMR sensors. The TMR sensors are all fabricated simultaneously to create four identical TMR sensors that have synthetic antiferromagnetic free layers as the top layer. The synthetic antiferromagnetic free layers comprise a first magnetic layer, a spacer layer, and a second magnetic layer. After forming the four identical TMR sensors, the spacer layer and the second magnetic layer are removed from two TMR sensors. Following the removal of the spacer layer and the second magnetic layer, a new magnetic layer is formed on the now exposed first magnetic layer such that the new magnetic layer has substantially the same thickness as the spacer layer and second magnetic layer combined.
Semiconductor testkey pattern and test method thereof
The invention provides a semiconductor testkey pattern, the semiconductor testkey pattern includes a high density device region and a plurality of resistor pairs surrounding the high density device region, wherein each resistor pair includes two mutually symmetrical resistor patterns.
OFFSET CALIBRATION AND DIAGNOSTICS FOR RESISTANCE-BASED BRIDGE CIRCUITS
Methods, apparatuses and systems for providing offset calibration and fault monitoring are disclosed herein. An example controller component may comprise: a resistance-based bridge circuit; a signal conditioning circuit configured to condition an output of the resistance-based bridge circuit; a first diagnostic circuit coupled to the signal conditioning circuit configured to monitor an output of a first branch of the resistance-based bridge circuit; and a second diagnostic circuit coupled to the signal conditioning circuit configured to monitor an output of a second branch of the resistance-based bridge circuit.