Patent classifications
G01R27/14
USING ELECTRICAL RESISTANCE TO ESTIMATE FORCE ON AN ELECTRODE DURING TEMPERATURE CHANGES
A processing system includes sensor circuitry and processing circuitry. The sensor circuitry is configured to, using the sensor electrodes, obtain capacitive measurements of a sensing region, and obtain a resistance measurement of the sensing region. The processing circuitry is coupled to the sensor circuitry. The processing circuitry is configured to determine a location of an input object using the capacitive measurements of the sensing region and determine a force value based on the resistance measurement and the location of the input object. Determining the force value mitigates a temperature variation of the sensing region affecting the resistance measurement. The processing circuitry is further configured to report the force value.
SEMICONDUCTOR DEVICES HAVING THROUGH-STACK INTERCONNECTS FOR FACILITATING CONNECTIVITY TESTING
Semiconductor devices having through-stack interconnects for facilitating connectivity testing, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor device includes a stack of semiconductor dies and a plurality of through-stack interconnects extending through the stack to electrically couple the semiconductor dies. The interconnects include functional interconnects and at least one test interconnect. The test interconnect is positioned in a portion of the stack more prone to connectivity defects than the functional interconnects. Accordingly, testing the connectivity of the test interconnect can provide an indication of the connectivity of the functional interconnects.
SEMICONDUCTOR DEVICES HAVING THROUGH-STACK INTERCONNECTS FOR FACILITATING CONNECTIVITY TESTING
Semiconductor devices having through-stack interconnects for facilitating connectivity testing, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor device includes a stack of semiconductor dies and a plurality of through-stack interconnects extending through the stack to electrically couple the semiconductor dies. The interconnects include functional interconnects and at least one test interconnect. The test interconnect is positioned in a portion of the stack more prone to connectivity defects than the functional interconnects. Accordingly, testing the connectivity of the test interconnect can provide an indication of the connectivity of the functional interconnects.
Using electrical resistance to estimate force on an electrode during temperature changes
A processing system includes sensor circuitry and processing circuitry. The sensor circuitry is configured to, using the sensor electrodes, obtain capacitive measurements of a sensing region, and obtain a resistance measurement of the sensing region. The processing circuitry is coupled to the sensor circuitry. The processing circuitry is configured to determine a location of an input object using the capacitive measurements of the sensing region; and determine a force value based on the resistance measurement and the location of the input object. Determining the force value mitigates a temperature variation of the sensing region affecting the resistance measurement. The processing circuitry is further configured to report the force value.
Using electrical resistance to estimate force on an electrode during temperature changes
A processing system includes sensor circuitry and processing circuitry. The sensor circuitry is configured to, using the sensor electrodes, obtain capacitive measurements of a sensing region, and obtain a resistance measurement of the sensing region. The processing circuitry is coupled to the sensor circuitry. The processing circuitry is configured to determine a location of an input object using the capacitive measurements of the sensing region; and determine a force value based on the resistance measurement and the location of the input object. Determining the force value mitigates a temperature variation of the sensing region affecting the resistance measurement. The processing circuitry is further configured to report the force value.
Semiconductor devices having through-stack interconnects for facilitating connectivity testing
Semiconductor devices having through-stack interconnects for facilitating connectivity testing, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor device includes a stack of semiconductor dies and a plurality of through-stack interconnects extending through the stack to electrically couple the semiconductor dies. The interconnects include functional interconnects and at least one test interconnect. The test interconnect is positioned in a portion of the stack more prone to connectivity defects than the functional interconnects. Accordingly, testing the connectivity of the test interconnect can provide an indication of the connectivity of the functional interconnects.
Semiconductor devices having through-stack interconnects for facilitating connectivity testing
Semiconductor devices having through-stack interconnects for facilitating connectivity testing, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor device includes a stack of semiconductor dies and a plurality of through-stack interconnects extending through the stack to electrically couple the semiconductor dies. The interconnects include functional interconnects and at least one test interconnect. The test interconnect is positioned in a portion of the stack more prone to connectivity defects than the functional interconnects. Accordingly, testing the connectivity of the test interconnect can provide an indication of the connectivity of the functional interconnects.
Device and method of detecting leakage current generation condition in USB interface
A device for detecting a leakage current generation condition in a universal serial bus (USB) interface including at least one pull-up circuit connected to the at least one power pin, and a port controller configured to detect at least one impedance between a ground pin and at least one power pin, detect a leakage current generation condition in the at least one power pin based on the at least one impedance detected, and activate a detection signal in response to the leakage current generation condition being detected, the port controller configured to detect the at least one impedance by controlling the at least one pull-up circuit to pull up the at least one power pin and detecting a voltage of the at least one power pin may be provided.
Monitoring apparatus and a food processing device using the same
The invention relates to a monitoring apparatus configured to monitor a processing status of a food item under processing in a food processor, the monitoring apparatus comprising a sensor operable to determine characteristic information related to the food item in the food processor, a controller configured to provide a control signal to the food processor to control an operation of the food processor when the determined characteristic 5 information or a rate of change of the determined characteristic information meets a predetermined criteria.
Monitoring apparatus and a food processing device using the same
The invention relates to a monitoring apparatus configured to monitor a processing status of a food item under processing in a food processor, the monitoring apparatus comprising a sensor operable to determine characteristic information related to the food item in the food processor, a controller configured to provide a control signal to the food processor to control an operation of the food processor when the determined characteristic 5 information or a rate of change of the determined characteristic information meets a predetermined criteria.