G01R31/20

Wafer inspection method and inspection apparatus

A wafer inspection method and inspection apparatus are provided. On a wafer having layout lines connecting electrode points of individual dies in series, the dies within a matrix range are inspected one after another in turn in a column/row control means by a first switch group and a second switch group of a probe card, so that each die is selectively configured in a test loop of a test process by turning on/off of a corresponding switch. Thus, after inspection of a die under inspection (a selected die) within the matrix range is complete, the column/row control means is used to switch to a next die to achieve fast switching. Accordingly, for the inspection procedure of each die within the matrix region, a conventional procedure of moving one after another in turn can be eliminated, significantly reducing the total test time needed and enhancing inspection efficiency.

Aligning mechanism and aligning method
11131708 · 2021-09-28 · ·

An aligning mechanism according to one aspect of the present disclosure includes a mounting table on which a substrate is placed; a holding section configured to hold the mounting table from below; lifting pins configured to raise or lower the mounting table with respect to the holding section; and an aligner configured to support the holding section from below, and to change a position of the holding section relative to the lifting pins. In the holding section and the aligner, through-holes are formed such that the lifting pins can penetrate the through-holes.

PROBE PIN CLEANING PAD AND CLEANING METHOD FOR PROBE PIN

A probe pin cleaning pad is provided, including a release layer or composite plate, an adhesive layer, a substrate layer, and a cleaning layer. The adhesive layer is disposed on the release layer or composite plate. The substrate layer is disposed on the adhesive layer. The cleaning layer is disposed on the substrate layer. A cleaning method for a probe pin is also provided.

Electrical tree test method, electrode structure, and electrode setting assembly

This electrical tree test method is a method for testing for electrical trees in an insulating member including a mica insulation applied to an electrical conductor. The method comprises: an assembly setting step of setting an electrode setting assembly to the outside of the mica insulation; an impregnation step of impregnating the mica insulation with synthetic resin after the assembly setting step; a removal step of removing components of the electrode setting assembly, except an electrode structure, after the impregnation step; a power supply connecting step of connecting, after the removal step, the electrical conductor and the electrode structure to a power supply in order to apply a voltage between the electrical conductor and the electrode structure; and a voltage applying step of applying a voltage between the electrical conductor and the electrode structure, after the power supply connecting step.

Electrical tree test method, electrode structure, and electrode setting assembly

This electrical tree test method is a method for testing for electrical trees in an insulating member including a mica insulation applied to an electrical conductor. The method comprises: an assembly setting step of setting an electrode setting assembly to the outside of the mica insulation; an impregnation step of impregnating the mica insulation with synthetic resin after the assembly setting step; a removal step of removing components of the electrode setting assembly, except an electrode structure, after the impregnation step; a power supply connecting step of connecting, after the removal step, the electrical conductor and the electrode structure to a power supply in order to apply a voltage between the electrical conductor and the electrode structure; and a voltage applying step of applying a voltage between the electrical conductor and the electrode structure, after the power supply connecting step.

Probe

A probe for inspecting characteristics of a terminal of a multipolar connector includes a flange having a through hole and serving to mount the probe to a facility; and a coaxial cable inserted through the through hole of the flange, extending in an axial direction, and having an end portion at which a probe pin is mounted. The probe also includes a plunger containing the probe pin and having a recess for fitting the multipolar connector, with the probe pin being exposed in the recess. The probe further includes a spring containing the coaxial cable between the flange and the plunger and having an end portion fixed to the flange and another end portion fixed to the plunger.

EDDY CURRENT SYSTEM FOR USE WITH ELECTRICALLY-INSULATIVE STRUCTURES AND METHODS FOR INDUCTIVELY HEATING OR INDUCTIVELY INSPECTING
20210018556 · 2021-01-21 ·

An eddy current system and methods of performing operations on a structure using the eddy current system are presented. The eddy current system comprises an ion beam source and a magnetic field source with at least one of variable output intensity or variable output orientation.

EDDY CURRENT SYSTEM FOR USE WITH ELECTRICALLY-INSULATIVE STRUCTURES AND METHODS FOR INDUCTIVELY HEATING OR INDUCTIVELY INSPECTING
20210018556 · 2021-01-21 ·

An eddy current system and methods of performing operations on a structure using the eddy current system are presented. The eddy current system comprises an ion beam source and a magnetic field source with at least one of variable output intensity or variable output orientation.

Secure coprocessor assisted hardware debugging
10895597 · 2021-01-19 · ·

Systems, apparatuses, and methods for implementing debug features on a secure coprocessor to handle communication and computation between a debug tool and a debug target are disclosed. A debug tool generates a graphical user interface (GUI) to display debug information to a user for help in debugging a debug target such as a system on chip (SoC). A secure coprocessor is embedded on the debug target, and the secure coprocessor receives debug requests generated by the debug tool. The secure coprocessor performs various computation tasks and/or other operations to prevent multiple round-trip messages being sent back and forth between the debug tool and the debug target. The secure coprocessor is able to access system memory and determine a status of a processor being tested even when the processor becomes unresponsive.

Interconnect structure with varying modulus of elasticity
10866264 · 2020-12-15 · ·

An interconnect structure is provided which includes: a member having a first end coupled to a test card, and a second end opposite the first end; and a contact tip at the second end of the member, the contact tip to removably attach to another interconnect structure of a device under test, where a modulus of elasticity of the member varies along a length of the member.