Patent classifications
G01R31/2601
Placement stand and electronic device inspecting apparatus
Provided is an electronic device inspection apparatus that suppresses cost increase. A prober is provided with a stage on which a carrier or a wafer is placed. The stage is provided with a stage cover on which the carrier is placed, a cooling unit in contact with the stage cover, and an LED irradiation unit facing the carrier across the stage cover and the cooling unit. Each of the stage cover and the cooling unit is formed of light-transmitting material. A light-transmitting coolant flows in a coolant flow path in the cooling unit. The LED irradiation unit has a plurality of LEDs oriented to the carrier. The carrier is formed of a glass substrate having a substantially disk-like shape. A plurality of electronic devices is arranged on a surface of the carrier at predetermined intervals.
Testing of semiconductor chips with microbumps
A device includes a test pad on a chip. A first microbump has a first surface area that is less than a surface area of the test pad. A first conductive path couples the test pad to the first microbump. A second microbump has a second surface area that is less than the surface area of the test pad. A second conductive path couples the test pad to the second microbump.
IGBT MODULE RELIABILITY EVALUATION METHOD AND DEVICE BASED ON BONDING WIRE DEGRADATION
The disclosure discloses an IGBT module reliability evaluation method and device based on bonding wire degradation, which belong to the field of IGBT reliability evaluation. The realization of the method includes: obtaining a relationship between a IGBT chip conduction voltage drop U.sub.ces and an operating current I.sub.c along with a chip junction temperature T.sub.c; for an IGBT module under test, obtaining the conduction voltage drop U.sub.ces-c of the IGBT chip through the operating current I.sub.c and the chip junction temperature T.sub.c; obtaining an external conduction voltage drop U.sub.ces-m of the IGBT module by using a voltmeter; performing subtraction to obtain a voltage drop at a junction of a IGBT chip and a bonding wire, and combining the operating current to obtain a resistance at the junction; determining that the IGBT module has failed when the resistance at the junction increases to 5% of an equivalent impedance of the IGBT module.
Real-time online prediction method for dynamic junction temperature of semiconductor power device
The present invention discloses a real-time online prediction method for a dynamic junction temperature of a semiconductor power device. The present invention has advantages as follows: the sampling value of electrical parameters required for system closed-loop control is multiplexed as inputs, and no additional system hardware circuits and costs are needed; the processor resources can be saved to the utmost extent by using the idea of discrete iterative calculation, online calculation can be realized, and real-time performance of dynamic junction temperature calculation can be ensured; an optimal fitting dynamic thermal resistance discretization model is creatively proposed, and is used to perform iterative calculation, so that while real-time performance of dynamic junction temperature calculation of the power device is ensured, calculation accuracy is also ensured, meeting the requirements of protection, life prediction, and reliability design of the power device, and this method is very suitable for actual engineering application.
Probe card, semiconductor measuring device, and semiconductor measuring system
A probe card has an edge sensor. The edge sensor has a first needle and a second needle. The first needle and the second needle are in contact with each other when the first needle and a wafer are not in contact with each other, and the first needle and the second needle are not in contact with each other when the first needle and the wafer are in contact with each other. The probe card has a resistor connected between the first needle and the second needle.
LIGHT EMITTING DEVICE INCLUDING BASE AND BASE CAP
A light emitting device includes: a base including a first wiring, a second wiring, and a third wiring; a first semiconductor laser element electrically connected to the first wiring and the second wiring, at an upper surface side of the base; and a second semiconductor laser element electrically connected to the second wiring and the third wiring, at the upper surface side of the base. The base includes a frame surrounding the first semiconductor laser element and the second semiconductor laser element in a top view. The light emitting device further includes a base cap fixed to the frame such that the first semiconductor laser element and the second semiconductor laser element are enclosed in a space defined by the base and the base cap. The first semiconductor laser element and the second semiconductor laser element are connected in series.
DISTRIBUTED CONTROL SYSTEM AND SEMICONDUCTOR INSPECTION APPARATUS INCLUDING SAME
A distributed control system includes a tree topology network or a daisy-chain network including a communication parent station, communication child stations, and a plurality of communication paths among the communication parent station and the communication child stations, in which the communication parent station and the communication child stations include a scheduling unit that controls a transfer cycle that is temporal intervals of data transfer. The scheduling unit sets the transfer cycle that is the fastest out of a plurality of the data as a reference cycle, counts the number of times each time the reference cycle elapses, and imparts a value of the number of times to the reference cycle as a cycle number. When the cycle number reaches an optional number, the number of times is returned to an initial value, which makes one cycle of transfer control, and the transfer control is repeatedly executed. For the timing of the reference cycle at which the data is transferred, the scheduling unit defines a cycle number to which the reference cycle corresponds, on the basis of first information corresponding to the data.
GATE DRIVE CIRCUIT, TEST DEVICE, AND SWITCHING METHOD
A gate drive circuit is used in a dynamic characteristic test on a power semiconductor, the gate drive circuit includes a voltage source configured to change a gate voltage of a gate of the power semiconductor, a plurality of resistance setting circuits connected in parallel with the voltage source and the gate, and a switching circuit connecting at least one resistance setting circuit of the resistance setting circuits to the voltage source and the gate.
SYSTEMS AND METHODS FOR GENERATING AND MEASURING ELECTRICAL SIGNALS
Disclosed is a system for generating and measuring electrical signals. The system comprises a digital-to-analog converter module configured to generate one or more analog signals based on a control signal, and one or more channels. Each channel comprises an output terminal configured to be electrically connected to an electrical device, and a buffer circuit. The buffer circuit is configured to receive an analog signal of the one or more analog signals and to provide to the output terminal a voltage based on the voltage of the received analog signal. The buffer circuit is further configured to be electrically connected to a current source and to allow current to flow between the current source and the output terminal. The system further comprises a voltage measurement system and a current measurement system. The voltage measurement system is configured to measure, for each channel, a voltage indicative of the voltage at the output terminal of the channel. The current measurement system is configured to measure, for each channel, the current flowing through the output terminal of the channel. Also disclosed is method for generating and measuring electrical signals.
Method for manufacturing electronic apparatus, adhesive film for manufacturing electronic apparatus, and electronic component testing apparatus
A method for manufacturing electronic apparatus includes: a step (A) of preparing a structure provided with an adhesive film and one or two or more electronic components affixed to an adhesive surface of the adhesive film; a step (B) of disposing the structure in the electronic component testing apparatus such that the electronic component is positioned over an electronic component installation region of a sample stand of the electronic component testing apparatus in a defined manner; a step (C) of evaluating the properties of the electronic component in a state of being affixed to the adhesive film with the probe terminal being in contact with a terminal of the electronic component; and a step (D) of picking up the electronic component from the adhesive film after the step (C). A defined sample stand is also provided.