Embodiments according to the invention can provide methods of testing a SiC MOSFET, that can include applying first and second voltage levels across a gate-source junction of a SiC MOSFET and measuring first and second voltage drops across a reverse body diode included in the SiC MOSFET responsive to the first and second voltage levels, respectively, to provide an indication of a degradation of a gate oxide of the SiC MOSFET and an indication of contact resistance of the SiC MOSFET, respectively.

A carrier lifetime measurement method for measuring a lifetime of carriers in a measurement target object includes an irradiation step of irradiating a DUT 10 serving as a measurement target object with measurement light and stimulus light subjected to intensity modulation using a plurality of frequencies, an outputting step of outputting a detection signal by detecting an intensity of reflected light from the DUT 10 or transmitted light through the DUT 10, and a generation step of detecting a phase delay of the detection signal with respect to a modulation signal including a frequency in association with a concentration of impurities in a measurement target region of the plurality of frequencies and generating image data indicating a distribution of lifetimes of carriers in the DUT 10 on the basis of the phase delay.

Embodiments of a degradation phenomenon treatment method based on a photovoltaic module and a related device are disclosed. A high frequency signal is applied to the photovoltaic module when a degradation phenomenon occurs in the photovoltaic module to protect the photovoltaic module and suppress or eliminate the degradation phenomenon. The degradation phenomenon refers to degradation of electricity generation efficiency of the photovoltaic module under effect of an electric potential. Embodiments of the degradation phenomenon treatment method and the device resolve issues associated with a declined electrical energy conversion capability and decreased electricity generation efficiency of a photovoltaic module caused by a surface polarization phenomenon, a potential induced degradation (PID) phenomenon occurring in the photovoltaic module, or both.

A method of monitoring a condition of a SiC MOSFET can include (a) applying a first test gate-source voltage across a gate-source of a SiC MOSFET in-situ, the first test gate-source voltage configured to operate the SiC MOSFET in saturation mode to generate a first drain current in the SiC MOSFET, (b) applying a second test gate-source voltage across the gate-source of the SiC MOSFET in-situ, the second test gate-source voltage configured to operate the SiC MOSFET in fully-on mode to generate a second drain current in the SiC MOSFET, (c) determining a drain-source saturation resistance using the first drain current to provide an indication of a degradation of a gate oxide of the SiC MOSFET; and (d) determining a drain-source on resistance using the second drain current to provide an indication of a degradation of contact resistance of the SiC MOSFET.

A semiconductor apparatus includes a semiconductor device that performs signal processing, a driving control unit that controls drive of the semiconductor device, and a lifetime obtaining unit that obtains remaining lifetime information that represents a remaining lifetime of the semiconductor device. In a case where the remaining lifetime information represents a first length, the driving control unit drives the semiconductor device in a first condition. In a case where the remaining lifetime information represents a second length shorter than the first length, the driving control unit drives the semiconductor device in a second condition in which throughput of the signal processing is lower than that in a case where the semiconductor device is driven in the first condition, and the remaining lifetime of the semiconductor device is longer than that in the case where the semiconductor device is driven in the first condition.

An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.

A reliability determination method, which is configured to test a batch of semiconductor devices, includes: obtaining a Welbull distribution of lifetime of the batch of semiconductor devices; dividing the Welbull distribution into at least a first section and a second section, wherein the first section and the second section meet a confidence interval; generating a first trend line of the first section and a second trend line of the second section according to the first confidence level, in which the first trend line has a first slope and the second trend line has a second slope; determining the first slope exceeds a second slope; and determining a predicted reliability of the batch of the semiconductor device under a target quality level according to the first section.

A system, method and apparatus for measuring carrier lifetime of a device comprises subjecting a test device to a voltage via a voltage source associated with the test system, disconnecting the test device from the voltage source, measuring the voltage as a function of time, measuring the current as a function of time, and determining a carrier lifetime of the test piece according to the slope of the measured voltage and the measured current.

A semiconductor apparatus in accordance with the present teachings may include an identification information register configured to store identification information for identifying a semiconductor apparatus. The semiconductor apparatus may further include an identification information decoder configured to decode the identification information and output a decoding result as a select signal. The semiconductor apparatus may also include a word line enable control circuit configured to generate a word line control signal for enabling or disabling all word lines of the semiconductor apparatus simultaneously at a predetermined time according to the select signal.

The present disclosure provides a method for controlling a junction temperature of a device under test, including applying a reverse bias to a reference diode adjacent to the device under test, obtaining a calibration current of the reference diode under the reverse bias, deriving the junction temperature of the device under test according to the reference diode, and adjusting an environment temperature when the junction temperature of the device under test is deviated from a predetermined value by a predetermined temperature range.