G01R31/2642

Method and device of remaining life prediction for electromigration failure

A method for predicting remaining life of electromigration failure is disclosed. The methods includes: establishing an electromigration life model of a MOS device; acquiring a normal electromigration failure lifetime .sub.1, based on a current density and a first environment temperature under a preset normal operating condition and the electromigration life model; acquiring a current density stress, based on a target prognostic point .sub.2, a second environment temperature and the electromigration life model; inputting the current density stress into a MOS device electromigration failure warning circuit based on a prognostic cell; and if the prognostic circuit of EM failure for a MOS device outputs a high level after a time .sub.3, acquiring a remaining life of electromigration failure corresponding to .sub.2 based on .sub.1, .sub.2 and .sub.3. A device for remaining life prediction for electromigration failure is also disclosed.

Apparatus and method for testing semiconductor device and system comprising the same
10732219 · 2020-08-04 · ·

An apparatus for testing semiconductor devices and a system including the same includes a socket unit having a plurality of sockets into which a plurality of semiconductor devices are inserted, respectively. Also included is a module unit including a first sub-module for receiving a test signal from a host and providing the same test signal to each of the plurality of sockets, and a second sub-module including the same structure as the first sub-module. The first sub-module includes a first buffer unit including an amplifier having an input terminal to which an input signal is inputted and an output terminal to amplify and output the input signal inputted based on a reference voltage (VT), and a reference resistor having one end connected to the input terminal of the amplifier and the other end to which the reference voltage is applied, and a second buffer unit including the same structure as the first buffer unit.

MONITORING AN OPERATING CONDITION OF A TRANSISTOR-BASED POWER CONVERTER

An operating condition monitor (100) for monitoring an operating condition of a transistor-based power converter (102), comprising: a sensing apparatus (106) configured to measure a turn-off transient energy of the power converter (102), a processor (108) in communication with the sensing apparatus (106) to receive the measurement of the turn-off transient energy, the processor being configured to: compare the measurement of the turn-off transient energy to a threshold; and issue an event signal based on the comparison to the threshold meeting a comparison criterion. A method (200, 200) of monitoring an operating state of a transistor-based power converter is also disclosed.

Semiconductor device and operating method thereof
10725089 · 2020-07-28 · ·

A semiconductor includes a first circuit, a second circuit, and a comparison circuit. The first circuit includes a first transistor. The first circuit is configured to output a first output. A second circuit includes a second transistor. The second circuit is configured to output a second output. A comparison circuit is coupled to the first circuit and the second circuit. The comparison circuit is configured to compare the first output and the second output to generate a comparison result, and to output the comparison result. The first transistor decays over a time interval and the first output changes from a first voltage value to a second voltage value over the time interval. The second transistor does not decay over the time interval and the second output of the second circuit maintains to be the third voltage value over the time interval.

HISTORY MANAGEMENT PAD OF SEMICONDUCTOR TEST SOCKET, MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR TEST DEVICE INCLUDING HISTORY MANAGEMENT PAD
20200233029 · 2020-07-23 · ·

The present invention relates to a history management pad of a semiconductor test socket, a manufacturing method thereof, and a semiconductor test device including the history management pad. According to the present invention, a history management pad of a semiconductor test socket is provided, the history management pad which is installed on one side of the periphery of a socket frame of a semiconductor test socket composed of a socket body and the socket frame, is characterized by including: an insulating molded film member provided with a plurality of electrode units in the thickness direction; a guide film means which is formed above the molded film member and guides and supports the mounting of a tracking chip to the molded film member; the tracking chip which is conductively connected to an upper end part of the electrode units of the molded film member; and a fixing means for fixing the tracking chip to the guide film means, wherein electrode unit lower end parts protruding from socket frame holes formed at positions corresponding to the electrode units are connected to a pad of a socket printed circuit board.

History management pad of semiconductor test socket, manufacturing method thereof, and semiconductor test device including history management pad
10718809 · 2020-07-21 · ·

The present invention relates to a history management pad of a semiconductor test socket, a manufacturing method thereof, and a semiconductor test device including the history management pad. According to the present invention, a history management pad of a semiconductor test socket is provided, the history management pad which is installed on one side of the periphery of a socket frame of a semiconductor test socket composed of a socket body and the socket frame, is characterized by including: an insulating molded film member provided with a plurality of electrode units in the thickness direction; a guide film means which is formed above the molded film member and guides and supports the mounting of a tracking chip to the molded film member; the tracking chip which is conductively connected to an upper end part of the electrode units of the molded film member; and a fixing means for fixing the tracking chip to the guide film means, wherein electrode unit lower end parts protruding from socket frame holes formed at positions corresponding to the electrode units are connected to a pad of a socket printed circuit board.

Method and device for estimating level of damage or lifetime expectation of power semiconductor module

The present invention concerns a method and a device for estimating a level of damage or a lifetime expectation of a power semiconductor module comprising at least one die that is mechanically, thermally, and electrically attached to a substrate, composed of plural layers of different materials. The invention: obtains power losses of the power semiconductor module, obtains the temperature in at least two different locations of the power semiconductor module, estimates a thermal model between the at least two different locations of the power semiconductor module using the determined power losses and the obtained temperatures, determines if a notification indicating the level of damage or the lifetime expectation has to be performed according to the estimated thermal model and a reference thermal model. notifies the level and location of damage or the lifetime expectation if the determining step determines that the notification has to be performed.

Testing of semiconductor devices and devices, and designs thereof

In accordance with an embodiment of the present invention, a method of testing a plurality of semiconductor devices includes applying a stress voltage having a peak voltage on a shield line disposed over a substrate. The substrate has functional circuitry of a semiconductor device. A fixed voltage is applied to a first metal line disposed above the substrate adjacent the shield line. The first metal line is coupled to the functional circuitry and is configured to be coupled to a high voltage node during operation. The peak voltage is greater than a maximum fixed voltage. The shield line separates the first metal line from an adjacent second metal line configured to be coupled to a low voltage node during operation. The method further includes measuring a current through the shield line in response to the stress voltage, determining the current through the shield line of the semiconductor device, and based on the determination, identifying the semiconductor device as passing the test.

System and method for measuring junction temperature of power module

A system and method for measuring a junction temperature of a power module junction temperature are provided. The method is capable of improving accuracy of temperature measurement by more accurately applying temperature change in a junction temperature rising section, capable of more accurately predicting durability life of a power module, and capable of increasing output power of the power module.

RELIABILITY TEST FIXTURE FOR FLEXIBLE DISPLAY COMPONENT AND ONLINE RELIABILITY TEST DEVICE FOR FLEXIBLE DISPLAY COMPONENT

Disclosed are a reliability test fixture and an online test device (100) for a flexible display component. The fixture comprises a support (110) and a rotating shaft (120) rotatably mounted on the support. A engagement recess (122) for fixing a flexible display component is provided in an axial direction on the surface of the rotating shaft (120). A test module (130) used to detect an electrical parameter of an internal circuit of the flexible display component is disposed inside the rotating shaft (120). The test module (130) has a test contact (132) for electrically connecting to the flexible display component. During a test, the flexible display component is fixed in the engagement recess (122) and is electrically connected to the test module (130). In this way, each time the rotating shaft (120) bents the flexible display component, the test module (130) can timely detect the electrical parameter of the internal circuit of the bent flexible display component. The reliability test fixture and online device can form an online reliability test device of a flexible display component, so as to test in real time the change of the internal circuit of the flexible display component.