A device for converting electrical energy, including at least one switching-type semiconductor component, a cooling path for cooling the semiconductor component, and a device for determining a degradation of the cooling path based on a current having a predetermined current intensity that flows through the component. The device provides that the semiconductor component includes an optically active semiconductor material, which generates light having a brightness that is dependent on a temperature of the semiconductor component when the semiconductor component is traversed by current having a predetermined current intensity, and the device for determining the degradation includes a brightness sensor for recording the brightness of the generated light. The device has the advantage that the device for determining the degradation and the component are inherently galvanically isolated, and the degradation can be determined at a high resolution.

A method of detecting failure of a semiconductor device includes forming an active fin on an active region of a substrate, the active fin extending in a first direction, forming a gate structure on the active fin, the gate structure extending in a second direction intersecting the first direction, forming source/drain layers on respective portions of the active fins at opposite sides of the gate structure, forming a wiring to be electrically connected to the source/drain layers, and applying a voltage to measure a leakage current between the source/drain layers. Only one or two active fins may be formed on the active region. Only one or two gate structures may be formed on the active fin.

A semiconductor device includes a signal processing circuit configured to generate an output signal, an output pad, an output line connecting the signal processing circuit to the output pad, the output signal from the signal processing circuit being output from the output pad through the output line, a shorting pad formed in the output line, a switch connected between the shorting pad and the output pad, and configured to connect the signal processing circuit to the output pad when the switch is on, and disconnect the signal processing circuit from the output pad when the switch is off, and a wiring line connecting the shorting pad to the output pad.

At least one embodiment of the present disclosure provides a display substrate motherboard, a display substrate, a fabrication method thereof and a display device. The display substrate motherboard includes at least one display substrate unit, the display substrate unit includes a display region, a bonding region and a detection region, the bonding region is located on a side of the display region and the detection region is located on a side of the display region different from the bonding region and configured to detect the display substrate unit.

A semiconductor device includes a substrate including a circuit region and an outer border, a plurality of detecting devices disposed over the substrate and located between the circuit region and the outer border, first and second probe pads electrically connected to two ends of each detecting device, and a seal ring located between the outer border of the substrate and the detecting devices. A method for detecting defects in a semiconductor device includes singulating a die having a substrate, a plurality of detecting devices, a first probe pad and a second probe pad electrically connected to two ends of each detecting device, and a seal ring; probing the first and the second probe pads to determine a connection status of the detecting devices; and recognizing a defect when the connection status of the detecting devices indicates an open circuit.

A dummy element includes: a semiconductor substrate; a lower insulating film deposited on the semiconductor substrate; a first resistive layer deposited on the lower insulating film; an interlayer insulating film covering the first resistive layer; a first pad-forming electrode deposited on the interlayer insulating film so as to be connected to the first resistive layer, and including an extending portion to be in Schottky contact with the semiconductor substrate; a relay wire connected to the first resistive layer and connected to the semiconductor substrate with an ohmic contact; and a counter electrode allocated under the semiconductor substrate, the dummy element simulating a defective state in the lower insulating film and the interlayer insulating film immediately under the first pad-forming electrode included in a corresponding resistive element as a target to be examined.

An electronic device has a sealing part 90, a first main terminal 11 protruding outward from the sealing part 90, a second main terminal 12 protruding outwardly from the sealing part, an electronic element 95 provided in the sealing part and having a front surface electrically connected to the first main terminal 11 and a back surface electrically connected to the second main terminal 12, a head part 40 connected to the front surface of the electronic element 95, a sensing terminal 13 protruding to an outside from the sealing part 90 and used for sensing and a connection part 35 integrally formed with the head part 40 and electrically connected to the sensing terminal 13. A current flowing through the sensing terminal 13 and the connection part 35 among a sensing current path does not overlap a main current path flowing through the second main terminal 12, the electronic element 95 and the first main terminal 11.

Reference center circuitry for a metrology system is disclosed. In one embodiment, the circuitry includes a reference sensor having a topology and characteristics identical to a number of sensors throughout an IC. The both the reference sensor and the sensors on the IC may be used to perform voltage and temperature measurements. The reference sensor may receive a voltage from a precision voltage supply, and may be used as a sensor to provide a basis for calibrating the other sensors, as well. Thereafter, temperature readings obtained from the other sensors may be correlated to the readings obtained by the reference sensor for enhanced accuracy. The reference center circuitry also includes analog process monitoring circuitry, which may be coupled to some, if not all of the transistors implemented on an IC.

A semiconductor device includes first and second pads separated from each other, first and second test elements connected to the first and second pads and connected to each other in parallel between the first and second pads, a first diode connected to the first test element in series, and a second diode connected to the second test element in series.

Embodiments relate to systems and methods for sensor self-diagnostics using multiple signal paths. In an embodiment, the sensors are magnetic field sensors, and the systems and/or methods are configured to meet or exceed relevant safety or other industry standards, such as SIL standards. For example, a monolithic integrated circuit sensor system implemented on a single semiconductor ship can include a first sensor device having a first signal path for a first sensor signal on a semiconductor chip; and a second sensor device having a second signal path for a second sensor signal on the semiconductor chip, the second signal path distinct from the first signal path, wherein a comparison of the first signal path signal and the second signal path signal provides a sensor system self-test.