Embodiments herein relate to ensuring the integrity of signal paths in stacked semiconductor devices. In an example implementation, a faulty signal path between die can be repaired by re-routing the path within the affected die, in a per-layer repair approach. Also disclosed are a sequential repair process for N-stacked die prior to integration, an in-field fault detection and repair technique, a proactive in-field repair technique for preemptive die maintenance, and a technique to drive select lines of repair multiplexers to provide rerouting of signal paths.

An inspection is performed to a semiconductor device including a source region formed on an upper surface side of a semiconductor substrate, a drain region formed on a lower surface side of the semiconductor substrate, a trench formed on an upper surface, and a gate electrode and a field plate electrode that are formed in the trench. In the inspection, the source electrode and the drain electrode are fixed to a ground potential, an offset voltage is applied to the field plate electrode, and a screening voltage is applied to the gate electrode. Consequently, insulation properties between the source region and the gate electrode and insulation properties between the gate electrode and the field plate electrode are inspected.

A semiconductor device apparatus is provided. The apparatus includes a packaged semiconductor device mounted on a substrate. The packaged semiconductor device includes a semiconductor die having a controller configured to obtain a measured capacitance of a sensor capacitor, an encapsulant encapsulating the semiconductor die, and a first plate of the sensor capacitor formed at a bottom side of the packaged semiconductor device. A second plate of the sensor capacitor is formed at a top side of the substrate.

Provided is a substrate testing apparatus including a substrate support including a first surface configured to support a substrate and a second surface opposite to the first surface, and a photographing hole penetrating through the first surface and the second surface, a camera arranged below a lower surface of the substrate support, and configured to photograph the skeleton chips through the photographing hole of the substrate support, and a probe device arranged above the substrate and configured to apply a voltage to the skeleton chips. The probe device comprises a probe pin configured to contact a chip bump arranged on an upper surface of a skeleton chip, a probe card in contact with an upper surface of the probe pin, a lower plate arranged under a lower surface of the probe card, and a support protrusion arranged under the lower plate, and configured to be detachable.