Patent classifications
G01R31/2648
SEMICONDUCTOR DEVICE DEFECT ANALYSIS METHOD
A method of analyzing defects in a semiconductor device includes: collecting current data by applying a test voltage to the semiconductor device; extracting data within a decrease range from the current data; dividing the current data into a first component value and a second component value using the current data and the data extracted from within the decrease range; calculating a first quality index from the first component value satisfying a first function; and calculating a second quality index from the second component value satisfying a second function that is different from the first function.
SEMICONDUCTOR WAFER EVALUATION APPARATUS AND SEMICONDUCTOR WAFER MANUFACTURING METHOD
A semiconductor wafer evaluation apparatus brings a contact maker (mercury liquefied at room temperature), as a Schottky electrode, into contact with a semiconductor wafer, intermittently applies a voltage from a pulse power supply, and evaluates the state (kinds, density) of point defects by an evaluation means based on the status of the electrostatic capacity of the semiconductor wafer. In this manner, the state (kinds, density) of the point defects in the plane of a large-diameter semiconductor wafer is directly evaluated using a large table.
Method for testing lifetime of surface state carrier of semiconductor
A method for testing a lifetime of a surface state carrier of a semiconductor, including the following steps, 1) a narrow pulse light source is used to emit a light pulse, and coupled to an interior of a near-field optical probe, and the near-field optical probe produces a photon-generated carrier on a surface of a semiconductor material under test through excitation. 2) The excited photon-generated carrier is concentrated on the surface of the semiconductor material, and recombination is conducted continuously with a surface state as a recombination center. 3) A change in a lattice constant is produced due to an electronic volume effect, a stress wave is produced, and a signal of the stress wave is detected in a high-frequency broadband ultrasonic testing mode. 4) Fitting calculation is conducted on the signal of the stress wave to obtain the lifetime of the surface state carrier τ.sub.c.
Concentration estimation method
A method of estimating a nitrogen site carbon concentration, in a first epitaxial layer made of carbon-doped gallium nitride of an electronic component, including steps of: estimating an electric capacitance of a stack interposed between the first layer and a first electrode of the component; heating the component; measuring an offset of a threshold voltage of the component; and deducing therefrom a nitrogen site carbon surface concentration in the first layer.
Photocurrent scanning system
A photocurrent scanning system comprises a laser generating device, a focusing device, a displacement adjustment device, a bias supply device, and a measuring device. The laser generating device is used to emit a laser. The focusing device is used to focus the laser to a surface of a sample. The displacement adjustment device is used to place the sample and adjust a position of the sample, to make the laser focused onto different parts of the surface of the sample. The bias supply device is used to supply a voltage to the sample. The measuring device is used to measure a photocurrent signal flowing through the sample.
METHOD AND APPARATUS FOR DETERMINING ELECTRICAL CHARACTERISTICS OF ORGANIC TRANSISTOR, AND STORAGE MEDIUM
Disclosed are a method and apparatus for determining electrical characteristics of a transistor, and a computer-readable storage medium. The method for determining electrical characteristics of a transistor includes: determining mobility characteristics of carriers in channels of the transistor at a transistor operating temperature condition; and determining electrical characteristics of the transistor based on the mobility characteristics of the carriers, semiconductor material properties of the transistor, and structural features of the transistor.
OPTICAL SYSTEMS AND METHODS OF CHARACTERIZING HIGH-K DIELECTRICS
The disclosed technology generally relates to characterization of semiconductor structures, and more particularly to optical characterization of high-k dielectric materials. A method includes providing a semiconductor structure comprising a semiconductor and a high-k dielectric layer formed over the semiconductor, wherein the dielectric layer has electron traps formed therein. The method additionally includes at least partially transmitting an incident light having an incident energy through the high-k dielectric layer and at least partially absorbing the incident light in the semiconductor. The method additionally includes measuring a nonlinear optical spectrum resulting from the light having the energy different from the incident energy, the nonlinear optical spectrum having a first region and a second region, wherein the first region changes at a different rate in intensity compared to the second region. The method further includes determining from the nonlinear optical spectrum one or both of a first time constant from the first region and a second time constant from the second region, and determining a trap density in the high-k dielectric layer based on the one or both of the first time constant and the second time constant.
Probe for testing an electrical property of a test sample
A probe for direct nano- and micro-scale electrical characterization of materials and semi conductor wafers. The probe (10) comprises a probe body (12), a first cantilever (20a) extending from the probe body. The first cantilever defining a first loop with respect to said probe body. The probe further comprises a first contact probe being supported by said first cantilever, and a second contact probe being electrically insulated from the first contact probe. The second contact probe being supported by the first cantilever or by a second cantilever (20b) extending from the probe body.
Optical systems and methods of characterizing high-k dielectrics
The disclosed technology generally relates to characterization of semiconductor structures, and more particularly to optical characterization of high-k dielectric materials. A method includes providing a semiconductor structure comprising a semiconductor and a high-k dielectric layer formed over the semiconductor, wherein the dielectric layer has electron traps formed therein. The method additionally includes at least partially transmitting an incident light having an incident energy through the high-k dielectric layer and at least partially absorbing the incident light in the semiconductor. The method additionally includes measuring a nonlinear optical spectrum resulting from the light having the energy different from the incident energy, the nonlinear optical spectrum having a first region and a second region, wherein the first region changes at a different rate in intensity compared to the second region. The method further includes determining from the nonlinear optical spectrum one or both of a first time constant from the first region and a second time constant from the second region, and determining a trap density in the high-k dielectric layer based on the one or both of the first time constant and the second time constant.
DETECTION UNIT, SEMICONDUCTOR FILM LAYER INSPECTION APPARATUS INCLUDING THE SAME, AND SEMICONDUCTOR FILM LAYER INSPECTION METHOD USING THE SAME
The present invention provides a semiconductor film layer inspection apparatus (10) for detecting the electrical characteristics of a semiconductor film layer (30) formed on one surface of a substrate (20) and including an oxide semiconductor layer (31), and a detection unit used therein. The apparatus includes a base unit (40), a detection unit (200) and a carrier generator (300 300a and 300b). The detection unit (200) includes: a detection probe pin (230) and a detection probe module (202). The detection probe pin (230) includes a detection probe pin body (231) and a detection probe pin contactor unit (233). The detection probe pin contactor unit at least partially forms a plurality of independently detectable and operable segmented pin contactor unit blocks.