A probe card for detecting a wafer. The probe card includes a light-output element, which is connected to a positioning element. The light-output element is set within a through hole of an electrical detection substrate. The light-output element is connected to a light source controller by an optical fiber, thereby an output light can be transmitted from the light source controller to the light-output element. The positioning element can move the light-output element in three-dimensional space or adjust an emitting angle from an axis of the light-output element. Therefore, an optical measurement and an electrical measurement can be implemented at the same time in the silicon photonic wafer test.

A method includes loading the semiconductor structure on a stage; providing a detector disposed above the semiconductor structure and the stage; applying a voltage to the semiconductor structure; identifying a portion of the semiconductor structure at a temperature substantially greater than a predetermined threshold by the detector; rotating the stage and recording a rotation of the stage after identifying the portion of the semiconductor structure; and deriving a position of the portion of the semiconductor structure based upon the rotation of the stage.

The invention relates to an integrated circuit with an active transistor area and a plurality of wiring layers arranged above the active transistor area. At least one optical device is integrated in the active transistor area. The optical device is electrically connected with at least one of the wiring layers. At least one optical tunnel extends from the at least one optical device through the plurality of wiring layers to a surface of an uppermost wiring layer of the plurality of wiring layers facing away from the active transistor area.

According to embodiments, a cantilever is provided. The cantilever includes a first conductive line, a second conductive line, and a third conductive line extending on the substrate, a microtip arranged on the substrate, and an emitter antenna arranged on the microtip, connected to the first to third conductive lines, and configured to produce a scattering signal of a terahertz wave band, wherein the emitter antenna includes a first emitter electrode connected to the first conductive line, a second emitter electrode connected to the second conductive line and adjacent to the first emitter electrode, a third emitter electrode connected to the third conductive line and spaced apart from the first emitter electrode with the second emitter electrode in-between, and a scattering part connecting the first and second emitter electrodes with each other.

A method that is disclosed that includes the operations outlined below. Dies are arranged on a test fixture, and each of the dies includes first antennas and at least one via array, wherein the at least one via array is formed between at least two of the first antennas to separate the first antennas. By the first antennas of the dies, test processes are sequentially performed on an under-test device including second antennas that positionally correspond to the first antennas, according to signal transmissions between the first antennas and the second antennas.

A method that is disclosed that includes the operations outlined below. Dies are arranged on a test fixture, and each of the dies includes first antennas and at least one via array, wherein the at least one via array is formed between at least two of the first antennas to separate the first antennas. By the first antennas of the dies, test processes are sequentially performed on an under-test device including second antennas that positionally correspond to the first antennas, according to signal transmissions between the first antennas and the second antennas.

A soft error inspection method for a semiconductor device includes: irradiating and scanning the semiconductor device with a laser beam or an electron beam; and measuring and storing a time of bit inversion for each of areas irradiated with the laser beam or the electron beam of the semiconductor device.

A soft error inspection method for a semiconductor device includes: irradiating and scanning the semiconductor device with a laser beam or an electron beam; and measuring and storing a time of bit inversion for each of areas irradiated with the laser beam or the electron beam of the semiconductor device.

A first light source is directed at an outer surface of a workpiece in an inspection module. The light from the first light source that is reflected from the outer surface of the workpiece is directed to the camera via a first pathway. The light from the first light source transmitted through the workpiece is directed to the camera via a second pathway. A second light source is directed at the outer surface of the workpiece 180 from that of the first light source. The light from the second light source that is reflected from the outer surface of the workpiece is directed to the camera via the second pathway. The light from the second light source transmitted through the workpiece is directed to the camera via the first pathway.

Various embodiments are described that relate to failure determination for an integrated circuit. An integrated circuit can be tested to determine if the integrated circuit is functioning properly. The integrated circuit can be subjected to a specific radiation such that the integrated circuit produces a response. This response can be compared against an expected response to determine if the response matches the expected response. If the response does not match the expected response, then the integrated circuit fails the test. If the response matches the expected response, then the integrated circuit passes the test.