A soft error inspection method for a semiconductor device includes: irradiating and scanning the semiconductor device with a laser beam or an electron beam; and measuring and storing a time of bit inversion for each of areas irradiated with the laser beam or the electron beam of the semiconductor device.

Disclosed are a system and method, wherein, during manufacturing of integrated circuit chips on a semiconductor wafer, an in-line optical inspection is performed to acquire a two-dimensional (2D) image of an area of the semiconductor wafer and to confirm and classify a defect in the area. The 2D image is then converted into a virtual three-dimensional (3D) image. To ensure that the 3D image is accurate, techniques are employed to determine the topography of the surface shown in the 2D image based on material-specific image intensity information and, optionally, to filter out any edge effects that result in anomalies within the 3D image. The resulting 3D image is usable for performing an in-line failure analysis to determine a root cause of a defect. Such an in-line failure analysis can be performed significantly faster than any off-line failure analysis and, thus, allows for essentially real-time advanced process control (APC).

Various approaches can be used to interrogate a surface such as a surface of a layered semiconductor structure on a semiconductor wafer. Certain approaches employ Second Harmonic Generation while other utilize four wave-mixing or multi-wave mixing. Corona discharge may be applied to the sample to provide additional information. Some approaches involve determining current flow from a sample illuminated with radiation.

Disclosed is a method for obtaining a computationally determined interference electric field describing scattering of radiation by a pair of structures comprising a first structure and a second structure on a substrate. The method comprises determining a first electric field relating to first radiation scattered by the first structure; determining a second electric field relating to second radiation scattered by the second structure; and computationally determining the interference of the first electric field and second electric field, to obtain a computationally determined interference electric field.

The present invention relates to a system and method for the simultaneous testing of radiation, environmental and electrical reliability of multiple semiconductor devices. The system provides a simultaneous simulation of the space environment in which a device under test (DUT) is expected to operate under thereby providing an accurate test environment. One or more DUTs are simultaneously subject to each of a radiating dose, electrical bias and varying temperature. Additionally, each of the above may be varied over a range of values to provide test data under multiple testing conditions. Finally, a method for operating the system is provided which ensures reliable and high fidelity data from the system. The system comprises seven (7) interconnected subsystems, an electrical environmental subsystem, a radiation subsystem, an environmental control system, a radiation source control system, a temperature monitoring subsystem, an electrical stimulation and data acquisition subsystem and a data processing and analysis subsystem.

The present invention relates to a system and method for the simultaneous testing of radiation, environmental and electrical reliability of multiple semiconductor devices. The system provides a simultaneous simulation of the space environment in which a device under test (DUT) is expected to operate under thereby providing an accurate test environment. One or more DUTs are simultaneously subject to each of a radiating dose, electrical bias and varying temperature. Additionally, each of the above may be varied over a range of values to provide test data under multiple testing conditions. Finally, a method for operating the system is provided which ensures reliable and high fidelity data from the system. The system comprises seven (7) interconnected subsystems, an electrical environmental subsystem, a radiation subsystem, an environmental control system, a radiation source control system, a temperature monitoring subsystem, an electrical stimulation and data acquisition subsystem and a data processing and analysis subsystem.

A method includes loading the semiconductor structure on a stage; providing a detector disposed above the semiconductor structure and the stage; applying a voltage to the semiconductor structure; identifying a portion of the semiconductor structure at a temperature substantially greater than a predetermined threshold by the detector; rotating the stage and recording a rotation of the stage after identifying the portion of the semiconductor structure; and deriving a position of the portion of the semiconductor structure based upon the rotation of the stage.

Systems and methods are provided for testing a threshold energy required to cause a latchup on an electronic component. An exemplary method includes applying a series of laser pulses to a testing object with a pulsed laser unit. The testing object is connected to a testing circuit which can measure the energy of each of the series of laser pulses, and detect whether a pulse of the series of laser pulses resulted in a latchup on the testing object. Upon detecting the pulse, the method provides for logging the energy of the pulse using a recording unit and logging the latchup status of the test device. If a latchup is detected, the testing circuit automatically mitigates the latchup event.

An optical inspection apparatus includes a stage that supports a target substrate, the target substrate including a plurality of light emitting elements, a jig that applies an electrical signal to the target substrate, the jig including a regulation resistor, a microscope that generates magnified image data of the target substrate, a camera that captures the magnified image data to generate a color image of the target substrate, and an optical measurement unit that captures the magnified image data of the target substrate to generate a spectrum image and measure optical characteristics of the target substrate.

The present invention relates to corona charge deposition systems that use High Voltage (HV) amplifiers for precisely controlling corona charge deposition. Some implementations, provide a corona charge deposition system that uses multiple voltage sources to maintain specified voltages applied on several electrodes to precisely control the corona current required to deposit a desired amount of charge on a sample. The HV amplifiers are able to source and sink currents to maintain stable voltages applied on control electrodes in the presence of a higher voltage applied on a needle electrode. The proposed apparatus and method of monitoring multiple signals, controlling multiple voltages, and predicting charge profile deposited on a sample can precisely control charge deposition processes.