A semiconductor die includes: a SiC substrate; power and current sense transistors integrated in the substrate such that the current sense transistor mirrors current flow in the main power transistor; a gate terminal electrically connected to gate electrodes of both transistors; a drain terminal electrically connected to a drain region in the substrate and which is common to both transistors; a source terminal electrically connected to source regions of the power transistor; a dual mode sense terminal; and a doped resistor region in the substrate between the transistors. The dual mode sense terminal is electrically connected to source regions of the current sense transistor. The doped resistor region has an opposite conductivity type as the source regions of both transistors and is configured as a temperature sense resistor that electrically connects the source terminal to the dual mode sense terminal.

An event-recording circuit for recording electrical events experienced by an internal circuit in a semiconductor device is disclosed. The event-recording circuit is coupled to the internal circuit via a spark gap circuit. The spark gap circuit includes one or more encapsulated air-gap structures that are fabricated using a process flow that matches, or is adapted from, a process flow used in fabricating the semiconductor device. The event-recording circuit further includes a recording device that has an electrical property that is changed by a signal passed by the spark gap circuit, such as an ESD or EOS signal. Accordingly, a test may be performed to determine the presence, and in some cases the extent, of the change to the electrical property in a failure analysis of the semiconductor device.

An event-recording circuit for recording electrical events experienced by an internal circuit in a semiconductor device is disclosed. The event-recording circuit is coupled to the internal circuit via a spark gap circuit. The spark gap circuit includes one or more encapsulated air-gap structures that are fabricated using a process flow that matches, or is adapted from, a process flow used in fabricating the semiconductor device. The event-recording circuit further includes a recording device that has an electrical property that is changed by a signal passed by the spark gap circuit, such as an ESD or EOS signal. Accordingly, a test may be performed to determine the presence, and in some cases the extent, of the change to the electrical property in a failure analysis of the semiconductor device.

A gate driver circuit is provided that includes a high-side power transistor; a low-side power transistor coupled to the high-side power transistor, where an output voltage is generated at a load node coupled between the low-side power transistor and the high-side power transistor; a gate driver configured to receive a high-side control signal and a low-side control signal, drive the high-side power transistor based on the high-side control signal, and drive the low-side power transistor based on the low-side control signal; and a short circuit detection circuit configured to monitor for short circuit events at the high-side power transistor and at the low-side power transistor based on the high-side control signal, the low-side control signal, and the output voltage, and, generate a fault signal in response to detecting a short circuit event at either of the high-side power transistor or the low-side power transistor.

The present invention concerns a method and a device (10) for monitoring a multi-die power module (15) comprising dies that are in a half-bridge switch configuration. The invention: sets the dies in a non conductive state, selects one die which is blocking a voltage, injects a current in a gate of the selected die in order to charge an input parasitic capacitance of the selected die, monitors a voltage that is representative of a voltage on the gate of the selected die, memorizes the value of the monitored voltage when the value of the monitored voltage is stabilized.

Embodiments of the present disclosure provide a method and a device for detecting a threshold voltage drift of a transistor in a pixel circuit, which are used for detecting the threshold voltage drift of the transistor to be detected in the pixel circuit. The transistor to be detected is at least one of the driving transistor and the detection transistor. The detection method comprises: inputting, during an inputting stage, a first turning-on voltage to the second scanning terminal, so as to turn on the detection transistor, enabling writing a first voltage into the second node through the detection signal terminal; inputting, during a detection stage, a first turning-off voltage to the second scanning terminal, so as to turn off the detection transistor, thereby detecting an actual voltage at the second node; and determining a state of the threshold voltage drift of the transistor to be detected according to the actual voltage and the first voltage.

Embodiments of the present disclosure provide a method and a device for detecting a threshold voltage drift of a transistor in a pixel circuit, which are used for detecting the threshold voltage drift of the transistor to be detected in the pixel circuit. The transistor to be detected is at least one of the driving transistor and the detection transistor. The detection method comprises: inputting, during an inputting stage, a first turning-on voltage to the second scanning terminal, so as to turn on the detection transistor, enabling writing a first voltage into the second node through the detection signal terminal; inputting, during a detection stage, a first turning-off voltage to the second scanning terminal, so as to turn off the detection transistor, thereby detecting an actual voltage at the second node; and determining a state of the threshold voltage drift of the transistor to be detected according to the actual voltage and the first voltage.

An inspection system includes a plurality of prober units each configured to bring probes of a probe card into contact with devices formed on a substrate on a stage, and a tester configured to apply electrical signals to the devices on the substrate through the probe card to inspect electrical characteristics of the devices. The plurality of prober units are arranged such that a plurality of units each of which has the prober units stacked in multiple stages are arranged in multiple rows in a horizontal direction, and at least one test unit constituting a main part of the tester is arranged to a side of a predetermined prober unit among the plurality of prober units.

A semiconductor apparatus includes a semiconductor device that performs signal processing, a driving control unit that controls drive of the semiconductor device, and a lifetime obtaining unit that obtains remaining lifetime information that represents a remaining lifetime of the semiconductor device. In a case where the remaining lifetime information represents a first length, the driving control unit drives the semiconductor device in a first condition. In a case where the remaining lifetime information represents a second length shorter than the first length, the driving control unit drives the semiconductor device in a second condition in which throughput of the signal processing is lower than that in a case where the semiconductor device is driven in the first condition, and the remaining lifetime of the semiconductor device is longer than that in the case where the semiconductor device is driven in the first condition.

A semiconductor device comprises a power device, a sensor which measures a physical state of the power device to transmit a signal according to the physical state, and a main electrode terminal through which a main current of the power device flows. The semiconductor device further comprises a sensor signal terminal connected to the sensor for receiving a signal from the sensor, a driving terminal which receives driving power for driving the power device, and an open bottomed case which houses the power device, the sensor, the main electrode terminal, the sensor signal terminal and the driving terminal. The first and second terminals electrically conduct with each other to form a double structure. Also, the sensor signal terminal and the driving terminal each have a first terminal and a second terminal which are not embedded within the case.