A device for monitoring a power semiconductor switch includes a circuit section for applying to the power semiconductor switch an HF voltage having a frequency above a switching threshold of the power semiconductor switch, a shunt resistor for detecting an actual HF current resulting from application of the HF voltage to the power semiconductor switch, a monitoring circuit for comparing the actual HF current with an expected HF current that depends on a switching state of the power semiconductor switch when the HF voltage is applied to the power semiconductor switch, and a comparator for generating a power semiconductor status signal depending on a result of the comparison. A corresponding method for monitoring a power semiconductor switch of this type is also described.

A testing module for a semiconductor wafer-form package includes a circuit board structure, first connectors, a first connecting structure, second connectors, third connectors and a first bridge connector. The circuit board structure includes two edge regions and a main region located therebetween. The first connectors are located over the edge regions and connected to the circuit board structure. The first connecting structure is located over and distant from the circuit board structure. The second connectors and third connectors are located over and connected to the first connecting structure, where the third connectors are configured to transmit electric signals for testing the semiconductor wafer-form package being placed over the main region. The first bridge connector is electrically coupling the circuit board structure and the first connecting structure by connecting the second connectors and the first connectors.

Provided are a power device, a sensor which measures a physical state of the power device to transmit a signal according to the physical state, a main electrode terminal through which a main current of the power device flows, a sensor signal terminal which is connected to the sensor to receive a signal from the sensor, a driving terminal which receives driving power for driving the power device, and an open bottomed case which houses the power device, the sensor, the main electrode terminal, the sensor signal terminal and the driving terminal, the sensor signal terminal and the driving terminal each having a first terminal and a second terminal which are provided away from an inner side wall surface of the case, the first and second terminals electrically conducting to each other to form a double structure.

In some examples, a circuit comprises a function unit configured to perform a circuit function, and one or more in situ monitors configured to measure internal data associated with the circuit. The circuit may further comprise a memory configured to store one or more limit values associated with the one or more in situ monitors, and a lifetime model unit configured to determine whether the circuit has reached an end-of-life threshold based on the measured internal data from the one or more in situ monitors and the limit values.

In some examples, a circuit comprises a function unit configured to perform a circuit function, and one or more in situ monitors configured to measure internal data associated with the circuit. The circuit may further comprise a memory configured to store one or more limit values associated with the one or more in situ monitors, and a lifetime model unit configured to determine whether the circuit has reached an end-of-life threshold based on the measured internal data from the one or more in situ monitors and the limit values.

A semiconductor package test apparatus is provided. A semiconductor package test apparatus comprises a test board including a plurality of sensors, a chamber into which the test board is loaded, and a controller configured to control a temperature of the chamber, wherein the controller adjusts the temperature using the plurality of sensors.

A semiconductor package includes a base film having a first mount section, a first folding section, a second folding section, and a second mount section. A first semiconductor chip is disposed on the first mount section of the base film. A second semiconductor chip is disposed on the second mount section of the base film. Test pads are disposed on the first or second folding sections of the base film and is connected to each of the first and second semiconductor chips. Connection pads are disposed on the first or second mount sections of the base film and are connected to each of the first and second semiconductor chips. The first and second folding sections vertically overlap each other. The test pads are interposed between and buried by the first and second folding sections.

A semiconductor package includes a base film having a first mount section, a first folding section, a second folding section, and a second mount section. A first semiconductor chip is disposed on the first mount section of the base film. A second semiconductor chip is disposed on the second mount section of the base film. Test pads are disposed on the first or second folding sections of the base film and is connected to each of the first and second semiconductor chips. Connection pads are disposed on the first or second mount sections of the base film and are connected to each of the first and second semiconductor chips. The first and second folding sections vertically overlap each other. The test pads are interposed between and buried by the first and second folding sections.

A semiconductor device may include a semiconductor wafer, and a reference circuit carried by the semiconductor wafer. The reference circuit may include optical DUTs, a first set of photodetectors coupled to outputs of the optical DUTs, an optical splitter coupled to inputs of the optical DUTs, and a second set of photodetectors coupled to the optical splitter. The optical splitter is to be coupled to an optical source and configured to transmit a reference optical signal to the first set of photodetectors via the optical DUTs and the second set of photodetectors.

An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.