According to some aspects of the present disclosure, power modules having current sensing circuits, and corresponding sensing methods, are disclosed. Example power modules include a printed circuit board (PCB) having a PCB trace, a first sense terminal coupled to the PCB trace at a first location, and a second sense terminal coupled to the PCB trace at a second location such that a resistance between the first and second sense terminals is defined by a resistance of the PCB trace between the first location and the second location. The power module further comprises a control coupled to the first sense terminal and the second sense terminal, the control adapted to measure a voltage between the first sense terminal and the second sense terminal and determine a current through the PCB trace based on the measured voltage and the resistance between the first sense terminal and the second sense terminal.

The present disclosure provides a method, system and apparatus for detecting polarity of component, and a computer-readable storage medium. The component polarity detection method includes: selecting first component symbols similar to graphs in a pre-created template library of component polarity symbols from a polar graph layer of a to-be-detected printed circuit board (PCB), and sifting out second component symbols each having polarity from the selected first component symbols; and traversing each second component symbol having polarity, to detect whether a polarity symbol that has been already stored in the template library is in the second component symbol having polarity; if yes, examining whether a polarity position of the polarity symbol in the second component symbol is correct; and if the polarity position is incorrect, outputting a report indicating that the polarity position of the polarity symbol in the second component symbol is incorrect.

The present invention is directed to a system for testing printed circuit boards. The system is configured to test the simultaneously test a multiplicity of printed circuit boards. The system examines the electrical characteristics of a printed circuit board and is operable to identify if a printed circuit board meets a desired characteristic.

A method of probing printed circuit boards that includes providing a circuit board design including a plurality of probe points, and selecting a probe point including a location ink from the plurality of probe points in the circuit board design to be probed on a physical printed circuit board design. The method continues with probing at least one probe point of the plurality of probe points with a probe that activates the location ink. Activation of the location ink by the probe indicates the selected probe point including the locating ink.

A method of securing a probe tip to a device under test (DUT), the method comprising: positioning the probe tip near a test point of the DUT, the probe tip comprising a connection point on a signal-path portion of the probe tip and an attachment tab, the connection point making an electrical connection with the test point of the DUT, the attachment tab extending away from the signal-path portion of the probe tip; applying an adhesive to the DUT through a hole in the attachment tab of the probe tip; and curing the adhesive to secure the probe tip to the DUT.

The present invention is directed to a system for testing printed circuit boards. The system is configured to test the simultaneously test a multiplicity of printed circuit boards. The system examines the electrical characteristics of a printed circuit board and is operable to identify if a printed circuit board meets a desired characteristic.

An automatic circuit board test system includes at least one switch module of board under test connected with a test board, a control module and a test process module. The test board includes a first signal interface, a second signal interface and a third signal interface and a repeater. The second signal interface and the third signal interface are mutually connected by a signal cable. The first signal interface is connected with the repeater. The at least one switch module of board under test is connected with the second signal interface and the third signal interface. The control module is connected with the at least one switch module of board under test. The control module controls the at least one switch module of board under test. The test process module is connected with the control module and the first signal interface by at least two serial port buses.

A testing system and method for testing a Printed Circuit Boards (PCBs) is provided. The method is being executed at a testing system which comprises a RF test analyzer; a RF energy source; and one or more RF probes. The method includes performing a first level scanning of a first set of components in the PCB. The method further includes performing a second level scanning of another set of components in the PCB, which differs from the first set of components in the PCB; the second level scanning is performed only if anomalies are identified which is based on analyzing the results of the performed first level scanning. The method further includes determining detailed root causes of the identified anomalies which is based on analyzing results of the performed second level scanning.

A potential difference early-warning circuit, comprising: a sensing resistor (R2), one end of the sensing resistor being connected to a signal ground (PCB GND); a first MOS (M1), a drain of the first MOS being connected to the other end of the sensing resistor (R2), and a source of the first MOS (M1) being connected to a safety ground (GND); an operational amplifier (U1A), a positive input end of the operational amplifier being connected to one end of the sensing resistor (R2), and a negative input end of the operational amplifier (U1A) being connected to the other end of the sensing resistor (R2); a second MOS (M2), a gate of the second MOS (M2) being connected to an output end of the operational amplifier (U1A), and a source of the second MOS (M2) being connected to the signal ground; and a controller, a first input end of the controller being connected to the drain of the second MOS (M2), and an output end of the controller being connected to the gate of the second MOS (M2); wherein the operational amplifier (U1A) is configured to transmit a corresponding level to the second MOS (M2) according to the magnitude of the potential difference between the signal ground (PCB GND) and the safety ground (GND), so as to control the second MOS (M2) to be turned on or turned off, so that the controller receives the corresponding level through the first input end, and then the controller controls the first MOS to be turned on or turned off according to the received level.

A test and measurement instrument has a user interface, one or more probes to allow the instrument to connect to a device under test (DUT), and one or more processors configured to execute code to cause the one or more processors to: receive one or more user inputs through the user interface, at least one of the user inputs to identify at least one analysis to be performed on the DUT, receive waveform data from the DUT when the DUT is activated by application of power from a power supply, and application of one of a first and second pulse or multiple pulses from a source instrument, perform the at least one analysis on the waveform data, and display the waveform data and analysis on the user interface. A method of automatically performing a double pulse test and analysis on a device under test (DUT) includes receiving a user input through a user interface on a test and measurement instrument, the user input to identify at least one analysis to be performed on waveform data received from the DUT, receiving the waveform data from the DUT when the DUT is activated by application of power from a power supply, and application of one of a first and a second pulse or multiple pulses from a source instrument, performing the analysis on the waveform data, and displaying the waveform data and analysis on the user interface.