A method of testing a bonded wire on a wire bonding machine is provided. The method includes the steps of: (a) bonding a portion of a wire to a bonding location using a wire bonding tool on a wire bonding machine to form a bonded portion of the wire; (b) moving the wire bonding tool away from the bonded portion of the wire after step (a) with the wire engaged with the wire bonding tool; and (c) moving the wire bonding tool along a motion profile after step (b), with the wire engaged with the wire bonding tool to test the wire.

A circuit comparing method includes the following operations: detecting several connection relationships between all starting points and all ending points corresponding to all starting points of a first circuit diagram; detecting several connection relationships between all starting points and all ending points corresponding to all starting points of a second circuit diagram; determining at least one difference between several connection relationships of the first circuit diagram and several connection relationships of the second circuit diagram; and outputting the at least one difference.

A system for testing complex integrated circuits in the field using updated tests, test sequences, models, and test conditions such as voltage and clock frequencies, over the life cycle of the circuit.

A system for testing a plurality of electrical circuits includes a first remote cooperative testing device including a testing component and a first transceiver and a second remote cooperative testing device including a conductive component and a second transceiver. In response to receiving instructions from a remote computing device, the first remote cooperative testing device locates a first electrical circuit and a second electrical circuit and selectively positions the testing component to electrically couple a first portion of the first electrical circuit to a first portion of the second electrical circuit at a first node, and the second remote cooperative testing device selectively positions the conductive component to electrically couple a second portion of the first electrical circuit to a second portion of the second electrical circuit at a second node, thereby forming a testing circuit between the first node and the second node.

The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, a device configured to monitor electrical overstress (EOS) events includes a pair of spaced conductive structures configured to electrically arc in response to an EOS event, wherein the spaced conductive structures are formed of a material and have a shape such that arcing causes a detectable change in shape of the spaced conductive structures, and wherein the device is configured such that the change in shape of the spaced conductive structures is detectable to serve as an EOS monitor.

A system for testing one or more electric circuits simultaneously includes one or more wireless testing devices connected to one or more electric circuits through wired connection, and a receiver device communicatively coupled to the one or more wireless testing devices through wireless connection. Each wireless testing device includes an input unit for converting a physical electrical input received from corresponding electric circuit, into an electrical signal, a generator unit configured to generate one or more variable service set identifier (SSID) communication signals based on corresponding input electrical signal, and a transmitter unit configured to transmit the one or more SSID communication signals to one or more receiver devices simultaneously. The receiver device is configured to receive and monitor the one or more SSID signals, to troubleshoot, verify, analyze, monitor, control and identify the one or more electrical circuits simultaneously.

A device may determine an analog gain for an aggregated analog signal. The aggregated analog signal may be associated with a calibration test to be used to determine a set of calibration parameters for a load test of a base station. The device may determine the set of calibration parameters for the load test based on an outcome of performing a calibration test. The set of calibration parameters may result in a set of digital gains approximately centered in a digital dynamic gain range. The device may perform the load test after determining the analog gain for the analog signal and based on the set of calibration parameters for the load test.

An apparatus for providing a supply voltage to a device under test includes: a controlled source; a switchable resistor circuited between the output of the controlled source and a dut port, having a comparatively smaller first resistance in a first switch state and a second resistance in a second switch state; a regulator that provides a control signal to the controlled source, to regulate a voltage to be provided to the dut. The apparatus changes a switch state of the switchable resistor while a voltage is provided to the dut via the switchable resistor. The apparatus injects a compensation signal into a control loop including the regulator, the controlled source and the switchable resistor, to thereby cause a change of the voltage provided by the controlled source, to at least partially compensate a change of a voltage drop across the switchable resistor.

An electrostatic discharge (ESD) shielding semiconductor device and an ESD testing method thereof, the ESD shielding semiconductor device includes an integrated circuit, a seal ring and a conductive layer. The integrated circuit is disposed on a die, and the integrated circuit has a first region and a second region. The seal ring is disposed on the die to surround the integrated circuit. The conductive layer at least covers the first region, and which is electrically connected to the seal ring.

An information handling system includes a management controller that may determine average power consumption of a processor, and determine average power measurement at a power supply unit. If the average power consumption of the processor does not match the average power measurement at the power supply unit, then the system may calibrate the average power consumption of the processor to match the average power measurement at the power supply unit.