A sensor integrated circuit including a regulator for generating a regulated voltage includes a digital load configured to draw a load current from the regulator in response to a clock signal during in situ operation and a comparator configured to determine the absence or presence of a fault during in situ operation. The load current is less than or equal to a predetermined level in the absence of a fault and is greater than the predetermined level in the presence of a fault. The comparator is responsive to the load current and to a threshold level and is configured to generate a comparator output signal having a level indicative of whether the load current is less than or greater than the threshold level in order to thereby determine the absence or presence of a fault during in situ operation, respectively.

An integrated circuit includes intellectual property (IP) processing circuitries each including a separate, respective at least one scan chain, and temperature management controller circuitry configured to transmit an input pattern including a plurality of bits to at least one scan chain of a first IP processing circuitry among the IP processing circuitries, detect a temperature of the first IP processing circuitries based on an output pattern received from the at least one scan chain in response to the input pattern being transmitted to the at least one scan chain of the first IP processing circuitry, and control at least one of an operation frequency or an operation voltage of the first IP processing circuitry based on the detected temperature of the first IP processing circuitry.

A semiconductor device inspection system (1) includes a laser beam source (2), for emitting light, an optical sensor (12) for detecting the light reflected by the semiconductor device (10) from the light and outputting a detection signal, a frequency band setting unit (16) for setting a measurement frequency band and a reference frequency band with respect to the detection signal, a spectrum analyzer (15) for generating a measurement signal and a reference signal from the detection signals in the measurement frequency band and the reference frequency band, and a signal acquisition unit (17) for calculating a difference between the measurement signal and the reference signal to acquire an analysis signal. The frequency band setting unit (16) sets the reference frequency band to a frequency domain in which a level of the detection signal is lower than a level obtained by adding 3 decibels to a white noise level serving as a reference.

A test assembly includes multiple circuit boards. Each board includes multiple pairs of contacts configurable to address the respective circuit board, an instrument, first and second headers at opposing edges of the respective board. Each pin of a first header electrically connects through the board to a corresponding pin of a second header. Each board includes first and second input/output (I/O) terminals at opposing edges of the respective board, the first I/O terminal electrically connects through the board to the second I/O terminal. A relay on the board permits the board's instrument to be activated. Each of the circuit boards mechanically and electrically connects to another circuit board through a jumper cable connecting the first header of one circuit board to the second header of another circuit board and through a conductive member electrically connecting the first I/O terminal of one board to the second I/O terminal of another board.

A temperature measurement member measures a temperature of an inspection object or a temperature of a mounting table on which the inspection object is placed inside an inspection apparatus that inspects the inspection object. The temperature measurement member is attached to an attachment position of a probe card used for electrical characteristic inspection in the inspection apparatus, and includes a main body having substantially a same shape as the probe card; a probe formed to extend from the main body toward the mounting table in a state in which the temperature measurement member is attached to the attachment position; and a temperature sensor configured to measure the temperature of the inspection object or the mounting table. The sensor transmits/receives a temperature measurement-related electrical signal to/from an inspection part via the probe card in the electrical characteristic inspection, and transmits a temperature measurement result to the inspection part.

A test system and test techniques for accurate high current parametric testing of semiconductor devices. In operation, the test system supplies a current to the semiconductor device and measures a voltage on the device. The testing system may use the measured voltage to compute an ON resistance for the high-current semiconductor device. In one technique, multiple force needles contact a pad in positions that provide equi-resistant paths to one or more sense needles contacting the same pad. In another technique, current flow through the force needles is regulated such that voltage at the pad of the device under test is representative of the ON resistance of the device and independent of contact resistance of the force needle. Another technique entails generating an alarm indication when the contact resistance of a force needle exceeds a threshold.

A system, apparatus, and method of testing a plurality of test circuits is disclosed that includes inputting experiment data to the plurality of test circuits; applying a control signal to each of the plurality of test circuits to control application of the experiment data to the plurality of test circuits; and shifting the control signal in response to applying the control signal to each of the plurality of test circuits so that a different bit of the control signal is applied to each of the plurality of test circuits. The method in an aspect further comprises reading out a data out signal from each of the plurality of test circuits; and shifting the data out signal in response to reading out the data out signal from each of the plurality of test circuits.

Systems and methods for detecting counterfeit integrated circuits are provided. One exemplary embodiment of a method can include: providing an integrated circuit for testing; and characterizing capacitive and inductive loading of the integrated circuit power for a specified frequency range; wherein the characterizing step further comprises applying a low level alternating current to a power pin while measuring for capacitance characterization conditions created by the integrated circuit's internal capacitance and inductance responses, wherein by sweeping the alternating current signal across a specified frequency range one or more capacitance related device signature can be created and used to identify a component as originating from a trusted source or not. A system can include components and machine readable instructions for operating the components using exemplary methods. Exemplary embodiments can include automated systems that can also be used with the device signature on a production line or in a supply chain verification location.

A magnetic field transducer mounting apparatus can include a first mount configured to fixedly couple to a side surface of a wafer test fixture magnet, and a second and third mount configured to adjustably position a magnetic field transducer in a predetermined location proximate a face of the wafer test fixture magnet.

The present invention has a first step for inputting an inspection signal having a predetermined pattern simultaneously to a plurality of devices connected in parallel to a tester and starting inspection having a predetermined pattern, a second step for determining whether a non-passing device is included in the predetermined pattern, a third step for sequentially executing a predetermined pattern and determining passing/non-passing (PASS/FAIL) status for each of the plurality of devices when it is determined in the second step that a non-passing device is included, and a fourth step for excluding a device determined as non-passing in the third step, subsequent inspection being performed for the devices other than the excluded device.