An integrated circuit (IC) includes: a first functional analog pin or pad; a first analog test bus coupled to the first functional analog pin or pad; first and second analog circuits coupled to the first analog test bus; and a test controller configured to: when the IC is in a functional operating mode, connect an input or output of the first analog circuit to the first analog test bus so that the input or output of the first analog circuit is accessible by the first functional analog pin or pad, and keep disconnected an input or output of the second analog circuit from the first analog test bus, and when the IC is in a test mode, selectively connect the input or output of the first and second analog circuits to the first analog test bus to test the first and second analog circuits using the first analog test bus.

Disclosed is a system for generating and measuring electrical signals. The system comprises a digital-to-analog converter module configured to generate one or more analog signals based on a control signal, and one or more channels. Each channel comprises an output terminal configured to be electrically connected to an electrical device, and a buffer circuit. The buffer circuit is configured to receive an analog signal of the one or more analog signals and to provide to the output terminal a voltage based on the voltage of the received analog signal. The buffer circuit is further configured to be electrically connected to a current source and to allow current to flow between the current source and the output terminal. The system further comprises a voltage measurement system and a current measurement system. The voltage measurement system is configured to measure, for each channel, a voltage indicative of the voltage at the output terminal of the channel. The current measurement system is configured to measure, for each channel, the current flowing through the output terminal of the channel. Also disclosed is method for generating and measuring electrical signals.

Provided herein may be a test circuit of an electronic device, the electronic device including the test circuit, and an operating method thereof. The electronic device may include analog circuits, a control circuit configured to connect, to an output terminal, each of a plurality of nodes respectively included in the analog circuits to an output terminal, a control signal generator configured to generate a control signal for controlling the control circuit based on an input signal received from an external device, and a switching circuit disposed on an electrical path for connecting the plurality of nodes and the control circuit to each other and configured to be electrically open during a preset time amount from a time point at which a voltage from an external power source starts to be applied to the control circuit.

Provided herein may be a test circuit of an electronic device, the electronic device including the test circuit, and an operating method thereof. The electronic device may include analog circuits, a control circuit configured to connect, to an output terminal, each of a plurality of nodes respectively included in the analog circuits to an output terminal, a control signal generator configured to generate a control signal for controlling the control circuit based on an input signal received from an external device, and a switching circuit disposed on an electrical path for connecting the plurality of nodes and the control circuit to each other and configured to be electrically open during a preset time amount from a time point at which a voltage from an external power source starts to be applied to the control circuit.

A method for testing a signal path in a sensor, the signal path including a filter circuit and a comparator circuit, the method including: closing a first signal line that is arranged to bypass a first capacitor in the filter circuit; injecting a test signal into the signal path after the first signal line is closed; and detecting whether a signal that is output by the comparator circuit in response to the test signal satisfies a predetermined condition.

A method for testing a signal path in a sensor, the signal path including a filter circuit and a comparator circuit, the method including: closing a first signal line that is arranged to bypass a first capacitor in the filter circuit; injecting a test signal into the signal path after the first signal line is closed; and detecting whether a signal that is output by the comparator circuit in response to the test signal satisfies a predetermined condition.

A method for diagnosing analog circuit fault based on cross wavelet features includes steps of: inputting an excitation signal to an analog circuit under test, and collecting time domain response output signals to form an original data sample set; dividing the original data sample set into a training sample set and a test sample set; performing cross wavelet decomposition on both sets; applying bidirectional two-dimensional linear discriminant analysis to process the wavelet cross spectra of the training sample set and the test sample set, and extracting fault feature vectors of the training sample set and the test sample set; submitting the fault feature vectors of the training sample set to a support vector machine for training an SVM classifier, constructing a support vector machine fault diagnosis model; and inputting the fault feature vectors of the test sample set into the model to perform fault classification.

A method for diagnosing analog circuit fault based on cross wavelet features includes steps of: inputting an excitation signal to an analog circuit under test, and collecting time domain response output signals to form an original data sample set; dividing the original data sample set into a training sample set and a test sample set; performing cross wavelet decomposition on both sets; applying bidirectional two-dimensional linear discriminant analysis to process the wavelet cross spectra of the training sample set and the test sample set, and extracting fault feature vectors of the training sample set and the test sample set; submitting the fault feature vectors of the training sample set to a support vector machine for training an SVM classifier, constructing a support vector machine fault diagnosis model; and inputting the fault feature vectors of the test sample set into the model to perform fault classification.

A system and method for monitoring a circuit for impending failure includes measuring changes to frequency-domain impedance with a pair of analog-to-digital converters connected to a conductor while powering up, with or without interposing a series sense resistor for measuring applied current. Changes to frequency-domain impedance or power delivery voltage ratio are identified via a neural network trained to identify frequency-domain impedance associated with normal system behavior and general system failure mode. The neural network may be further trained to produce a predictive probability of specific failure mode types.

A system and method for monitoring a circuit for impending failure includes measuring changes to frequency-domain impedance with a pair of analog-to-digital converters connected to a conductor while powering up, with or without interposing a series sense resistor for measuring applied current. Changes to frequency-domain impedance or power delivery voltage ratio are identified via a neural network trained to identify frequency-domain impedance associated with normal system behavior and general system failure mode. The neural network may be further trained to produce a predictive probability of specific failure mode types.