A method analyzes an operating condition of a power converter. The method includes: providing a sample clock signal; determining repeatedly at least one operating parameter of a power semiconductor device of the power converter; and determining the operating condition of the power converter depending on the at least one determined operating parameter. The repetitions of the determining the at least one operating parameter are synchronous to the sample clock signal. For a given repetition of the determination of the at least one operating parameter, determining the at least one operating parameter includes measuring the at least one operating parameter or identifying a value for the at least one operating parameter from a previous repetition depending on a switching behavior of the power converter within the given repetition.

Provided is a grid-connected inverter safety detection device applied in a photovoltaic inverter system and including voltage detection circuit, a filter circuit, a comparison circuit and a controller. The voltage detection circuit is configured to detect a voltage between the point N and the ground, or a voltage between the first terminal for any phase of the three-phase power grid and the ground. The filter circuit is configured to filter out an alternating current component of the voltage detected by the voltage detection circuit and to retain an direct current component of the voltage. The comparison circuit is configured to compare the direct current component of the voltage with a preset voltage value and transmit a comparison result to the controller. The controller is configured to determine, according to the comparison result, whether an alternating current side at the output terminal of the inverter has normal insulation.

A detection of a failure of a phase (as a method and apparatus) in a system—supplied by multiple phases—including a DC link (5) is suggested. A rectified voltage (10) of the DC link (5) pulses at a multiple of the mains frequency as a fundamental wave. The rectified voltage (10) is filtered for detecting a signal component at the double frequency of the mains frequency (12). The rectified voltage (10) is also “filtered” for detecting an average link voltage (14). A ratio signal (17) is formed as a ratio of the average link voltage (14) to the signal component at the double frequency of the mains frequency (12). An error detection signal (19) results from a comparison of the ratio signal (17) with an error threshold (20).

A detection of a failure of a phase (as a method and apparatus) in a system—supplied by multiple phases—including a DC link (5) is suggested. A rectified voltage (10) of the DC link (5) pulses at a multiple of the mains frequency as a fundamental wave. The rectified voltage (10) is filtered for detecting a signal component at the double frequency of the mains frequency (12). The rectified voltage (10) is also “filtered” for detecting an average link voltage (14). A ratio signal (17) is formed as a ratio of the average link voltage (14) to the signal component at the double frequency of the mains frequency (12). An error detection signal (19) results from a comparison of the ratio signal (17) with an error threshold (20).

The present invention relates to switching element protection of a BLDC motor, such as used with a power tool. The present invention checks each switching element of a power stage individually for a short circuit when a trigger of the tool is actuated. Each switching element is turned ON for a period of time (such as 1-5 microseconds, for example), current flowing through the half-bridge or the full power stage is measured, and that switching element is turned OFF. When the current is greater than or equal to a threshold (such as 5 A, for example), the controller stops and indicates a fault condition. By testing each switching element in order, the controller is able to determine whether the shorted switching element is the opposite one in the half-bridge being tested.

A power supply arrangement is described that comprises a power supply module 10 including a supply connector 14 and an output connector 16, and an electrical circuit 18 interconnecting the supply connector 14 and the output connector 16, the electrical circuit 18 including a test point 30 to which a test module 36 may be connected, the test point 30 being electrically connected to the output connector 16.

Systems and methods of detecting non-uniform aging and degradation of power assembly units are disclosed. The system may include a first power assembly unit and a second power assembly unit adjacent to the first power assembly unit. Each of the first and second power assembly units has a coupling capacitor and a number of electrical components. The system may further include a current sensor in between the coupling capacitors of the first and second power assembly units to detect a current spike in the coupling capacitors and the electrical components.

Systems and methods of detecting non-uniform aging and degradation of power assembly units are disclosed. The system may include a first power assembly unit and a second power assembly unit adjacent to the first power assembly unit. Each of the first and second power assembly units has a coupling capacitor and a number of electrical components. The system may further include a current sensor in between the coupling capacitors of the first and second power assembly units to detect a current spike in the coupling capacitors and the electrical components.

Implementations of ground fault circuit interrupter (GFCI) self-test circuits may include: a current transformer coupled to a controller, a silicon controlled rectifier (SCR) test loop coupled to the controller, a ground fault test loop coupled to the controller, and a solenoid coupled to the controller. The SCR test loop may be configured to conduct an SCR self-test during a first half wave portion of a phase and the ground fault test loop may be configured to conduct a ground fault self-test during a second half wave portion of a phase. An SCR may be configured to activate the solenoid to deny power to a load upon one of the SCR self-test or the ground fault self-test being identified as failing.

Implementations of ground fault circuit interrupter (GFCI) self-test circuits may include: a current transformer coupled to a controller, a silicon controlled rectifier (SCR) test loop coupled to the controller, a ground fault test loop coupled to the controller, and a solenoid coupled to the controller. The SCR test loop may be configured to conduct an SCR self-test during a first half wave portion of a phase and the ground fault test loop may be configured to conduct a ground fault self-test during a second half wave portion of a phase. An SCR may be configured to activate the solenoid to deny power to a load upon one of the SCR self-test or the ground fault self-test being identified as failing.