A vehicle having a diagnostic system for a fuse is provided. The vehicle has first and second voltage sensors, a current sensor, and a microcontroller. The first and second voltage sensors generate first and second signals, respectively, indicating first and second voltage levels, respectively, at first and second ends, respectively, of the fuse. The current sensor generates a third signal indicating a current level flowing through the fuse. The microcontroller determines first and second voltage values based on the first and second signals, respectively, a current value based on the third signal, and a first resistance value utilizing the first and second voltage values and the current value. The microcontroller generates a diagnostic signal indicating degraded operation of the fuse if the first resistance value is greater than an end-of-life resistance value.

The present invention relates to fuse diagnosis device and method using voltage distribution, and more particularly, to fuse diagnosis device and method using voltage distribution which connect a resistor unit and a diagnostic resistor to one side of the fuse so as to be connected with the battery in parallel and calculate voltage of a battery applied to the diagnostic resistor by using the voltage distribution to diagnose a state of the fuse, in order to diagnose the states of one or more fuses connected in parallel.

Apparatus and method for controlling a pyro-fuse. A pyro-fuse control system includes a current sensing circuit and a diagnostic circuit. The current sensing circuit is configured to determine whether the current flowing in conductor exceeds a threshold current. The diagnostic circuit is coupled to the current sensing circuit. The diagnostic circuit is configured to determine whether an indication of current exceeding the threshold current generated by the current sensing circuit is caused by current flowing the conductor and is not caused by a fault in the current sensing circuit.

A semiconductor wafer includes a semiconductor substrate having a plurality of die areas separated from one another by dicing areas. Each die area includes one or more metal layers above the semiconductor substrate and a plurality of fuse structures formed in at least one of the one or more metal layers. Each fuse structure includes a fuse area between first and second fuse heads. Each die area also includes a first pair of contacts connected to different areas of the first fuse head of at least some of the fuse structures. The wafer can be singulated along the dicing areas into individual dies. A corresponding method of fuse verification is also provided.

Systems and methods for detecting thermal-mechanical strain fatigue in an electrical fuse include a controller configured to monitor at least one fuse fatigue parameter over a period of time while the fuse is connected to an energized electrical power system, and based on the monitored at least one fuse fatigue parameter, the controller is further configured to determine at least one of a consumed service life of the fuse element or a service life remaining of the fuse element.

A retention member monitoring system for a slat-flap control lever assembly including a control lever movable over a range of discrete angular positions. Also included is a retention member engageable with the control lever to retain the control lever in each of the discrete angular positions. Further included is at least one electric device in communication with the retention member to determine the structural integrity of the retention member.

An Integrated Circuit (IC) includes electronic circuitry, an electronic fuse (eFuse) and a protection circuit. The eFuse is configured to be selectably programmed to a logical state. The electronic circuitry is configured to read the eFuse and to operate in accordance with the logical state read from the eFuse. The eFuse has a first range of operational voltages, and the electronic circuitry has a second range of operational voltages that is broader than the first range of operational voltages. The protection circuit is configured to prevent the electronic circuitry from misreading the logical state of the eFuse due to a voltage supply to the IC falling within the second operational voltage range but outside the first operational voltage range.

An Integrated Circuit (IC) includes electronic circuitry, an electronic fuse (eFuse) and a protection circuit. The eFuse is configured to be selectably programmed to a logical state. The electronic circuitry is configured to read the eFuse and to operate in accordance with the logical state read from the eFuse. The eFuse has a first range of operational voltages, and the electronic circuitry has a second range of operational voltages that is broader than the first range of operational voltages. The protection circuit is configured to prevent the electronic circuitry from misreading the logical state of the eFuse due to a voltage supply to the IC falling within the second operational voltage range but outside the first operational voltage range.

Circuits and methods for reading fusible links that allows use of low-voltage logic circuitry utilizing devices that may have a high-voltage stand-off capability. Embodiments provide predictable operation that is less susceptible to PVT variations, allow the use of arrays of fuses that may be scaled to relatively large memory sizes, uses little integrated circuit area, and do not require extra pins for operation. Embodiments utilize a latch circuit and voltage dividers to generate a reference voltage V.sub.REF and a fuse voltage V.sub.FUSE, and then compares and latches the greater of those voltages. The circuitry does not require any more supply voltage than is needed to turn ON input pass transistors to the latch at a slightly higher voltage (V.sub.TH) than V.sub.REF. Since V.sub.REF may be about 0.1V, that turn-ON voltage may be as low as about 0.1V+V.sub.TH, and thus would be less than a V.sub.DD_MIN of about 1V.

Circuits and methods for reading fusible links that allows use of low-voltage logic circuitry utilizing devices that may have a high-voltage stand-off capability. Embodiments provide predictable operation that is less susceptible to PVT variations, allow the use of arrays of fuses that may be scaled to relatively large memory sizes, uses little integrated circuit area, and do not require extra pins for operation. Embodiments utilize a latch circuit and voltage dividers to generate a reference voltage V.sub.REF and a fuse voltage V.sub.FUSE, and then compares and latches the greater of those voltages. The circuitry does not require any more supply voltage than is needed to turn ON input pass transistors to the latch at a slightly higher voltage (V.sub.TH) than V.sub.REF. Since V.sub.REF may be about 0.1V, that turn-ON voltage may be as low as about 0.1V+V.sub.TH, and thus would be less than a V.sub.DD_MIN of about 1V.