The present invention relates to a method for calibrating a channel delay skew of automatic test equipment (ATE), the method comprising: providing multiple calibration reference devices, wherein the calibration reference devices have a second plurality of delay paths each having a predetermined path delay value and coupling a pair of pins of one of the calibration reference devices together, wherein each pin is coupled to at most one delay path; coupling each of the calibration reference devices with the ATE, respectively, wherein the test probe of each of the first plurality of test channels is coupled with a pin of one of the calibration reference devices; testing the calibration reference devices to obtain multiple delay measurements from one or more transmitting channels of the first plurality of test channels to one or more receiving channels of the first plurality of test channels using the ATE; and calculating based on the delay measurements.

A method and system to perform the verification of measures done by a sensor in quasi real-time. The sensor verification may be implemented at two different levelsa functionality level and a measurement level. At the functionality level, a consistency check of information from different variables may be processed at sensor level depending on the functionality of the physical system being measured. At the measurement level, diagnostics may be performed of the circuits present in the measurement path by specific circuitry and at suitable instants of time to guarantee a Fault Tolerant Time Interval while minimizing sample loss. This may be achieved, at least in part, by increasing the measuring sample rate.

A calibration method includes (a) connecting a impedance measuring device to an impedance standard which has at least two excitation terminals for feeding an excitation signal and two measuring terminals for determining a measurement signal, and which has a fixed or adjustable impedance which corresponds to the impedance target; (b) applying a voltage signal to the excitation terminals and measuring the current flowing through the impedance standard due to the voltage signal at the measuring terminals; or supplying a current signal to the excitation terminals and measuring the dropping voltage at the measuring terminals; and (c) calibrating the impedance measuring device against the impedance standard to the impedance target. The geometrical arrangement of terminals of the impedance standard corresponds to the geometrical arrangement of the terminals of the cell of which the impedance is to be measured.

Methods, apparatuses and systems for providing offset calibration and fault monitoring are disclosed herein. An example controller component may comprise: a resistance-based bridge circuit; a signal conditioning circuit configured to condition an output of the resistance-based bridge circuit; a first diagnostic circuit coupled to the signal conditioning circuit configured to monitor an output of a first branch of the resistance-based bridge circuit; and a second diagnostic circuit coupled to the signal conditioning circuit configured to monitor an output of a second branch of the resistance-based bridge circuit.

The disclosure describes techniques for detecting a crack or defect in a material.

Systems and methods for calibrating a voltage measurement device are provided herein. The voltage measurement device generates a reference current signal and senses the reference current signal in a conductor under test. A calibration system may control a calibration voltage source to selectively output calibration voltages in a calibration conductor. The calibration system may obtain data from the voltage measurement device captured by the voltage measurement device when measuring the calibration conductor. Such data may include one or more reference current measurements, one or more voltage measurements, etc. The calibration system utilizes the obtained measurements to generate calibration data which may be stored on the voltage measurement device for use thereby during subsequent operation. The calibration data may include one or more lookup tables, coefficients for one or more mathematical formulas, etc.

Systems and methods for operating and calibrating measurement devices are provided herein. The measurement devices generate reference current signals and sense the reference current signals in a conductor under test, which sensed signals are used to determine a calibration factor or a position of the conductor under test. A calibration system may control a calibration voltage source to selectively output calibration voltages in a calibration conductor. The calibration system may obtain data from the electrical parameter measurement device captured by the electrical parameter measurement device when measuring the calibration conductor. Such data may include one or more reference current measurements, one or more voltage measurements, etc. The calibration system utilizes the obtained measurements to generate calibration data which may be stored on the voltage measurement device for use thereby during subsequent operation. The calibration data may include one or more lookup tables, coefficients for one or more mathematical formulas, etc.

The present disclosure provides a power calibration adapter for wafer probers, the power calibration adapter comprising at least one first landing pad, for releasably contacting a wafer prober tip of the wafer prober, and a power meter interface for each one of the first landing pads that is coupled to the at least one first landing pad and that is configured to couple the at least one first landing pad to a power measurement device. Further, the present disclosure provides a respective Zo measurement application system and a respective method.

A first method (100) of providing a secondary reference for subsequent use in evaluating a power measuring accuracy of a wireless power measurement device (60) under test is presented. An inanimate calibration object (50) is subjected (110) to electromagnetic field variations (38) by controlling operating points of a reference wireless power transmitter device (30). Key power absorption parameters (58) of the calibration object (50) resulting from the electromagnetic field variations (38) are generated (120) and stored (130) together with data (57) that defines the operating points in a data storage (52) being associated (54) with the calibration object (50). A second method (200) of evaluating a power measuring accuracy of a wireless power measurement device (60, DUT) under test then involves providing (210) an inanimate calibration object, and retrieving (220), from a data storage (52) associated with the calibration object (50), stored key power absorption parameters (58) for the calibration object together with data (57) that defines operating points. The second method (200) further involves subjecting (230) the calibration object (50) to electromagnetic field variations (68) by causing the wireless power measurement device (60, DUT) to operate at the operating points defined by the retrieved data (57), obtaining (240) key power absorption parameters of the calibration object resulting from the electromagnetic field variations (68); and comparing the obtained key power absorption parameters and the retrieved key power absorption parameters (58) to obtain a measurement result being indicative of the power measuring accuracy of the wireless power measurement device (60, DUT).

A bandgap apparatus includes an error amplifier; a bandgap core including 2 BJT devices and core resistors for proportional to absolute temperature (PTAT) and complementary to absolute temperature (CTAT) current generations; a reference resistor for reference voltage generation; an NMOS current mirror having NMOS devices; a PMOS current mirror having PMOS devices; and 4 switches for controlling operation in a high-power mode or a low-power mode, wherein the high-power mode consumes more power than the low-power mode, wherein the error amplifier is switched on and the NMOS current mirror is switched off in the high-power mode, or the error amplifier is switched off and the NMOS current mirror is switched on in the low-power mode.