In order to solve a problem of conventional mask information adjusting apparatuses in which the data size of mask information that can produce precise exposure patterns is large, an mask information adjusting apparatus includes: a subject information acquiring unit that acquires pre-adjustment mask information containing a polygonal mask pattern; a processing unit that acquires the degree of influence of removal of each vertex or side of the mask pattern, on an exposure pattern that is generated using a photomask corresponding to the mask pattern, in association with the vertex or point, and simplifies the mask pattern by removing each vertex or side according to whether or not a predetermined condition regarding the acquired degree of influence is satisfied; and an output unit that outputs post-adjustment mask information containing the mask pattern that has been simplified by the processing unit.

A process of overlay offset measurement includes providing a substrate; forming a first pattern layer with a predetermined first pattern on the substrate; forming a first photoresist layer on the substrate and the first pattern layer; forming a second photoresist layer on the first photoresist layer; forming a second pattern layer with a predetermined second pattern on the second photoresist layer; patterning the second photoresist layer to form a trench having a predetermined third pattern being substantially aligned with the predetermined first pattern of the first pattern layer; and performing overlay offset measurement according to the second pattern layer and the trench.

A process of overlay offset measurement includes providing a substrate; forming a first pattern layer with a predetermined first pattern on the substrate; forming a first photoresist layer on the substrate and the first pattern layer; forming a second photoresist layer on the first photoresist layer; forming a second pattern layer with a predetermined second pattern on the second photoresist layer; patterning the second photoresist layer to form a trench having a predetermined third pattern being substantially aligned with the predetermined first pattern of the first pattern layer; and performing overlay offset measurement according to the second pattern layer and the trench.

Feature images representing a layout geometry of a lithographic mask are received. Mask function (MF) contributions from individual feature images are calculated by convolving the feature image with a corresponding three-dimensional mask (M3D) filter. The M3D filters represent an electromagnetic scattering effect of that feature image. At least one M3D filter also accounts for effects arising from a fabrication process for the lithographic mask.

Feature images representing a layout geometry of a lithographic mask are received. Mask function (MF) contributions from individual feature images are calculated by convolving the feature image with a corresponding three-dimensional mask (M3D) filter. The M3D filters represent an electromagnetic scattering effect of that feature image. At least one M3D filter also accounts for effects arising from a fabrication process for the lithographic mask.

A method for determining a target feature in a model of a patterning process based on local electric fields estimated for the patterning process is described. The method includes obtaining a mask stack region of interest. The mask stack region of interest has one or more characteristics associated with propagation of electromagnetic waves through the mask stack region of interest. The mask stack region of interest includes the target feature. The method includes estimating a local electric field based on the one or more characteristics associated with the propagation of electromagnetic waves through the mask stack region of interest. The local electric field is estimated for a portion of the mask stack region of interest in proximity to the target feature. The method includes determining the target feature based on the estimated local electric field.

A method for determining a target feature in a model of a patterning process based on local electric fields estimated for the patterning process is described. The method includes obtaining a mask stack region of interest. The mask stack region of interest has one or more characteristics associated with propagation of electromagnetic waves through the mask stack region of interest. The mask stack region of interest includes the target feature. The method includes estimating a local electric field based on the one or more characteristics associated with the propagation of electromagnetic waves through the mask stack region of interest. The local electric field is estimated for a portion of the mask stack region of interest in proximity to the target feature. The method includes determining the target feature based on the estimated local electric field.

A mask layout method includes: forming, on a mask, chip patterns arranged in an array, a scribe line being formed between every two adjacent chip patterns, the scribe line being used to provide mark patterns thereon, the mark patterns comprising at least first mark patterns; acquiring a set number of divided units of the first mark patterns; providing the set number of divided units in sequence on the scribe line so that the first mark patterns do not cover other mark patterns; and providing, on the scribe line, first mark pattern elements to replace at least two adjacent divided units, the first mark pattern elements completely overlapping patterns formed by the at least two adjacent divided units.

A memory device includes active regions and gate structures, each of the gate structures is electrically coupled to a first portion of a corresponding active region of the active regions. The memory device includes contact-to-transistor-component structures (MD structures), each of the MD structures is over a second portion of a corresponding active region, and a first MD structure is between adjacent gate structures. The memory device includes via-to-gate/MD (VGD) structures, each of the VGD structures is over to a corresponding gate electrode and MD structure. The memory device includes conductive segments, each of the conductive segments is over and electrically coupled to a corresponding VGD structure. The memory device includes buried contact-to-transistor-component structures (BVD) structures, each of the BVD structures is under a third portion of a corresponding active region. The memory device includes buried conductive segments, each of the buried conductive segments is under a corresponding BVD structure.

The present description concerns a method that includes the compression, by a processor, of an image comprising first patterns by transforming the image into a first representation formed of two-point elements. The method also includes the execution, by a neural network, of an inference operation on the first representation to generate a second representation formed of two-point elements. The method further includes the generation of a lithographic mask based on the decompression of the second representation.