The present invention refers to a method and an apparatus for determining positions of a plurality of pixels to be introduced into a substrate of a photolithographic mask by use of a laser system, wherein the pixels serve to at least partly correct one or more errors of the photolithographic mask. The method comprises the steps: (a) obtaining error data associated with the one or more errors; (b) obtaining first parameters of an illumination system, the first parameters determining an illumination of the photolithographic mask of the illumination system when processing a wafer by illuminating with the illumination system using the photolithographic mask; and (c) determining the positions of the plurality of pixels based on the error data and the first parameters.

The present invention refers to a method for performing an aerial image simulation of a photolithographic mask which comprises the following steps: (a) modifying an optical radiation distribution at a patterned surface of the photolithographic mask, depending on at least one first arrangement of pixels to be generated in the photolithographic mask; and (b) performing the aerial image simulation of the photolithographic mask by using the generated modified optical radiation distribution.

Apparatus and methods for improving flatness of extreme ultraviolet (EUV) mask blanks are disclosed. The apparatus and methods may utilize one or more of heating the backside and/or the front side of the EUV mask blank and a cooling system. Interfacial layers of the EUV mask blank are selectively heated, resulting in improved flatness of the EUV mask blanks.

Apparatus and methods to improve centroid wavelength uniformity of EUV mask blanks are disclosed. The apparatus and methods may utilize one or more of heating the backside and/or the front side of the EUV mask blank. Selected regions and sub regions of the EUV mask blank are selectively heated, resulting in improved centroid wavelength uniformity of EUV mask blanks.

A circuit layout patterning method includes: receiving a photomask substrate including a shielding layer; defining a chip region and a peripheral region adjacent to the chip region; forming a design pattern in the chip region; forming a reference pattern by emitting one first radiation shot and a beta pattern by emitting a plurality of second radiation shots in the peripheral region, wherein a pixel size of the first radiation shot is greater than a pixel size of the second radiation shot; comparing a width of the reference pattern and a width of the beta pattern; transferring the design pattern to the shielding layer if a difference between the width of the reference patterned and the width of the beta pattern is within a tolerance; and transferring the design pattern of the photomask to a semiconductor substrate.

The structure and methods of a reticle pod are provided. A reticle pod includes a base configured to support a reticle and a cover detachably coupled to the base. The cover includes a window that allows radiation at a wavelength between about 400 nm and about 700 nm to pass through with a transmittance of greater than 70%.

The structure and methods of a reticle pod are provided. A reticle pod includes a base configured to support a reticle and a cover detachably coupled to the base. The cover includes a window that allows radiation at a wavelength between about 400 nm and about 700 nm to pass through with a transmittance of greater than 70%.

A method of manufacturing a photomask including the steps of providing a photomask blank, inspecting the photomask blank to determine presence of one or more defects in the photomask blank, wherein the one or more defects comprise one or more photomask substrate defects, and compensating for the one or more photomask substrate defects by roughening one or more surface portions of the photomask substrate.

A method of manufacturing a photomask including the steps of providing a photomask blank, inspecting the photomask blank to determine presence of one or more defects in the photomask blank, wherein the one or more defects comprise one or more photomask substrate defects, and compensating for the one or more photomask substrate defects by roughening one or more surface portions of the photomask substrate.

A correction pattern generation device includes a processor configured to receive pattern information for a mask including a defect in a pattern formed on the mask, generate a correction pattern candidate for correcting the defect, calculate a correction difficulty degree for the correction pattern candidate, and select a correction pattern from correction pattern candidates based on the calculated correction difficulty degree for each correction pattern candidate if more than one correction pattern candidate for correcting the defect is generated.