The present invention pertains to a method of manufacturing segregated layers above a substrate. The invention also pertains to methods of manufacturing a photoresist layer, photoresist patterns, a processed substrate and a device.

The present invention pertains to a method of manufacturing segregated layers above a substrate. The invention also pertains to methods of manufacturing a photoresist layer, photoresist patterns, a processed substrate and a device.

A method of fabricating a circuit element, such as a quantum computing circuit element, including obtaining a lithography mask write file that includes mask information characterizing one or more mask features, obtaining a uniformity function that is configured to modify the mask information to compensate for a non-uniform deposition process, applying the uniformity function to the lithography mask write to obtain a modified lithography mask write file, and performing lithography as directed by the modified lithography mask write file.

A method of fabricating a circuit element, such as a quantum computing circuit element, including obtaining a lithography mask write file that includes mask information characterizing one or more mask features, obtaining a uniformity function that is configured to modify the mask information to compensate for a non-uniform deposition process, applying the uniformity function to the lithography mask write to obtain a modified lithography mask write file, and performing lithography as directed by the modified lithography mask write file.

A layout file for an integrated circuit has drawn geometries. Variable fill geometries are added to local areas based on densities of the drawn geometries in windows associated with the local areas and on the global density of all the drawn geometries in the layout file. Each window has a separate local area associated with it. The densities of the variable fill geometries in the local areas are not all equal. Densities of the fill geometries are higher in local areas associated with windows having lower densities of the drawn geometries, and for lower values of the global density. The layout file is stored in a computer-readable medium which may be used to produce a photomask for manufacturing an integrated circuit.

A layout file for an integrated circuit has drawn geometries. Variable fill geometries are added to local areas based on densities of the drawn geometries in windows associated with the local areas and on the global density of all the drawn geometries in the layout file. Each window has a separate local area associated with it. The densities of the variable fill geometries in the local areas are not all equal. Densities of the fill geometries are higher in local areas associated with windows having lower densities of the drawn geometries, and for lower values of the global density. The layout file is stored in a computer-readable medium which may be used to produce a photomask for manufacturing an integrated circuit.

In order to solve a problem of conventional mask information adjusting apparatuses in which the data size of mask information that can produce precise exposure patterns is large, an mask information adjusting apparatus includes: a subject information acquiring unit that acquires pre-adjustment mask information containing a polygonal mask pattern; a processing unit that acquires the degree of influence of removal of each vertex or side of the mask pattern, on an exposure pattern that is generated using a photomask corresponding to the mask pattern, in association with the vertex or point, and simplifies the mask pattern by removing each vertex or side according to whether or not a predetermined condition regarding the acquired degree of influence is satisfied; and an output unit that outputs post-adjustment mask information containing the mask pattern that has been simplified by the processing unit.

A method comprises receiving an integrated circuit (IC) chip design, and generating, by one or more processors and based on the IC chip design, dose information, a wafer image, and a wafer target. Further, the method comprises modifying, by the one or more processors, the dose information based on a comparison of the wafer image and the wafer target. Further, the method comprises outputting the modified dose information to a mask writing device.

In a method of manufacturing a photo mask for lithography, circuit pattern data are acquired. A pattern density, which is a total pattern area per predetermined area, is calculated from the circuit pattern data. Dummy pattern data for areas having pattern density less than a threshold density are generated. Mask drawing data is generated from the circuit pattern data and the dummy pattern data. By using an electron beam from an electron beam lithography apparatus, patterns are drawn according to the mask drawing data on a resist layer formed on a mask blank substrate. The drawn resist layer is developed using a developing solution. Dummy patterns included in the dummy pattern data are not printed as a photo mask pattern when the resist layer is exposed with the electron beam and is developed.

A polymer comprising recurring units derived from vinylanthraquinone, recurring units containing a benzene ring having a hydroxyl-bearing tertiary alkyl group bonded thereto, and recurring units derived from hydroxystyrene is provided. The polymer is used as a base resin to formulate a negative resist composition having a high resolution and minimal LER.