A photo mask for an extreme ultraviolet (EUV) lithography includes a circuit pattern, and sub-resolution assist patterns disposed around and connected to the circuit pattern. A dimension of the sub-resolution assist patterns is in a range from 10 nm to 50 nm.

Vacuum-integrated photoresist-less methods and apparatuses for forming metal hardmasks can provide sub-30 nm patterning resolution. A metal-containing (e.g., metal salt or organometallic compound) film that is sensitive to a patterning agent is deposited on a semiconductor substrate. The metal-containing film is then patterned directly (i.e., without the use of a photoresist) by exposure to the patterning agent in a vacuum ambient to form the metal mask. For example, the metal-containing film is photosensitive and the patterning is conducted using sub-30 nm wavelength optical lithography, such as EUV lithography.

Vacuum-integrated photoresist-less methods and apparatuses for forming metal hardmasks can provide sub-30 nm patterning resolution. A metal-containing (e.g., metal salt or organometallic compound) film that is sensitive to a patterning agent is deposited on a semiconductor substrate. The metal-containing film is then patterned directly (i.e., without the use of a photoresist) by exposure to the patterning agent in a vacuum ambient to form the metal mask. For example, the metal-containing film is photosensitive and the patterning is conducted using sub-30 nm wavelength optical lithography, such as EUV lithography.

The present invention is a composition for forming a metal oxide film, comprising (A) a metal oxide nanoparticle, (B) a flowability accelerator, which is a compound and/or a polymer having a molecular weight of 5000 or less represented by one or more selected from the following general formulae (I), (II) and (III), and (C) an organic solvent, wherein a weight ratio of the (A) metal oxide nanoparticle to the (B) flowability accelerator is 10/90 to 90/10. This makes it possible to provide a composition for forming a metal oxide film having excellent dry etching resistance relative to a previously-known organic underlayer film composition and also has high filling and planarizing properties, a patterning process using the composition, and a method for forming a metal oxide film (resist underlayer film).

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The present invention is a composition for forming a metal oxide film, comprising (A) a metal oxide nanoparticle, (B) a flowability accelerator, which is a compound and/or a polymer having a molecular weight of 5000 or less represented by one or more selected from the following general formulae (I), (II) and (III), and (C) an organic solvent, wherein a weight ratio of the (A) metal oxide nanoparticle to the (B) flowability accelerator is 10/90 to 90/10. This makes it possible to provide a composition for forming a metal oxide film having excellent dry etching resistance relative to a previously-known organic underlayer film composition and also has high filling and planarizing properties, a patterning process using the composition, and a method for forming a metal oxide film (resist underlayer film).

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A method comprises receiving an integrated circuit (IC) chip design, and generating, by one or more processors, a wafer image and a wafer target from the IC chip design. The method further comprises generating, by the one or more processors, sensitivity information based on a determination that the wafer image and the wafer target converge, and outputting the sensitivity information. The sensitivity information is associated with writing a mask written for the IC chip design.

An image pickup apparatus includes a stage configured to support a sample at a plurality of support points, a bending data acquisition unit configured to acquire bending data corresponding to a bending of the sample supported on the stage, a height information detection unit configured to detect a height of the sample supported on the stage, a difference value calculation unit configured to calculate a difference value between a height indicated by height information and a height indicated by the bending data at each of a plurality of points on the sample, a correction data calculation unit configured to calculate correction data based on the difference value, and an estimation unit configured to calculate estimation data for estimating the height of the sample by correcting the bending data using the correction data.

An image pickup apparatus includes a stage configured to support a sample at a plurality of support points, a bending data acquisition unit configured to acquire bending data corresponding to a bending of the sample supported on the stage, a height information detection unit configured to detect a height of the sample supported on the stage, a difference value calculation unit configured to calculate a difference value between a height indicated by height information and a height indicated by the bending data at each of a plurality of points on the sample, a correction data calculation unit configured to calculate correction data based on the difference value, and an estimation unit configured to calculate estimation data for estimating the height of the sample by correcting the bending data using the correction data.

Techniques relating to synthesizing masks for use in manufacturing a semiconductor device are disclosed. These techniques include providing, by a processor, a design pattern for a semiconductor device as input to a trained machine learning (ML) model. The techniques further include performing, using the ML Model, a plurality of dilated convolutions relating to the design pattern, and inferring, using the ML model, one or more masks for use in manufacturing the semiconductor device, based on the plurality of dilated convolutions.

Techniques relating to synthesizing masks for use in manufacturing a semiconductor device are disclosed. These techniques include providing, by a processor, a design pattern for a semiconductor device as input to a trained machine learning (ML) model. The techniques further include performing, using the ML Model, a plurality of dilated convolutions relating to the design pattern, and inferring, using the ML model, one or more masks for use in manufacturing the semiconductor device, based on the plurality of dilated convolutions.