The present disclosure provides a mask plate, including a first region corresponding to a GOA region of an array substrate and a second region corresponding to a display region of the array substrate. The first region comprises at least one first aperture, the at least one first aperture is used to form a GI via-hole penetrating through a gate insulating layer at the GOA region, and a gate line is exposed through the GI via-hole. The second region comprises at least one second aperture, the at least one second aperture is a half-tone mask aperture and is used to form a VIA via-hole at the display region, and a source/drain metal layer pattern is exposed through the VIA via-hole.

A mask device for optical alignment and equipment thereof are disclosed. The mask device comprises a first mask having a first overlapping region and a first non-overlapping region and a second mask having a second overlapping region and a second non-overlapping region. The first and second mask overlap with each other. The first overlapping and non-overlapping regions, the second overlapping and non-overlapping regions comprise openings respectively. The height of the openings of the first and the second overlapping region are arranged to vary according the trigonometric square such that the height of the openings at the same position that the overlapping regions overlap with each other is the same as that the openings of the first or the second non-overlapping regions. Compared with the current technology, the disclosure may eliminate the defects of the striped mura in the liquid crystal display to increase the display quality of the products.

A method of optical proximity correction (OPC) in extreme ultraviolet lithography (EUV) lithography includes providing a patterned layout design including first and second design polygons that correspond with the pre-pattern opening, wherein the first and second design polygons are separated by a separation distance, and correcting the patterned layout design using OPC by generating (1) a third polygon that has dimensions corresponding to a combination of the first and second design polygons and the separation distance and (2) and filled polygon within the third polygon, thereby generating an OPC-corrected patterned layout design. EUV photomasks may be manufactured from the OPC-corrected patterned layout design, and integrated circuits may be fabricated using such EUV photomasks.

Technologies are generally described for a photoresist and methods and systems effective to form a pattern in a photoresist on a substrate. In some examples, the photoresist includes a resin, a photoinitiator and a photoinhibitor. The photoinitiator may be effective to generate a first reactant upon the absorption of at least one photon of a particular wavelength of light. The first reactant may be effective to render the resin soluble or insoluble in a photoresist developer. The photoinhibitor may be effective to generate a second reactant upon the absorption of at least one photon of the particular wavelength of light. The second reactant may be effective to inhibit the first reactant.

A process for fabricating an integrated circuit is provided. The process includes providing a substrate and forming a hard mask on the substrate. The hard mask may be formed by atomic-layer deposition (ALD) or molecular-layer deposition (MLD). The process also includes disposing an exposure mask over the hard mask and exposing the exposure mask to a patterning particle to pattern a gap in the hard mask. The patterning particle may be, for example, a photon or a charged particle.

UV light may be directed through a patterned window to cause selective UV exposure of certain areas of a substrate. A stress-tunable film deposited on the substrate may undergo localized stress changes from selective UV exposure. Localized stress changes in the stress-tunable film may mitigate wafer bowing in the substrate. The patterned window may be designed with UV-transparent regions and UV-non-transparent regions to facilitate targeted UV exposure of the stress-tunable film. In some implementations, the patterned window may include a metal coating, a ceramic cover, or a metal cover for selective UV exposure. In some implementations, the patterned window may further include transition regions that permit partial transmission of UV light to limit stress changes in corresponding areas of the stress-tunable film.

A semiconductor fabrication apparatus comprising a light source configured to emit light, a substrate stage arranged to receive a substrate exposed to the emitted light, a reticle arranged between the substrate stage and the light source, and a reticle stage arranged to receive the reticle. The reticle stage including a lower plate, an upper plate arranged above the lower plate, an actuator connected to the lower plate configured to move in a direction parallel to the upper plate, a first cable slab arranged between the upper plate and the lower plate and connected to one side of the actuator, and a first cable cover that surrounds an outer periphery of the first cable slab and contacts the lower plate when the first cable slab becomes bent.

A screen mask for screen printing and a manufacturing method of the same are disclosed. A screen mask includes a mesh, a first mask layer having a first thickness and located in a first region of the mesh, a second mask layer having a second thickness and located in a second region of the mesh, and the first mask layer has an opening adjacent to a boundary of the second mask layer.

In one embodiment, a blanking aperture array system includes a blanking aperture array substrate provided blankers corresponding to each beam of a multi beam, a first radiation shield, and a second radiation shield. A circuit section applying a voltage to the blankers is disposed closer to a peripheral edge than a cell section including the blankers. The first radiation shield includes a first plate covering over the circuit section, disposed on an upper surface of the blanking aperture array substrate, and extending from a peripheral edge of a first opening for passage of the multi beam. The second radiation shield covers under the circuit section, and includes a lower peripheral wall section that hangs down from a lower surface of the blanking aperture array substrate and surrounds the cell section, and a lower plate extending from a peripheral edge of a lower opening for passage of the multi beam.