Patent classifications
G05F1/46
BANDGAP AMPLIFIER BIASING AND STARTUP SCHEME
Systems and circuits include an amplifier having an output; a switching circuit coupled to the output of the amplifier to provide a bias current to bias the amplifier; first current generating circuitry coupled to the switching circuit; and second current generating circuitry coupled to the output of the amplifier and to the switching circuit. In operation, the switching circuit provides the bias current, during a first time period, in response to a first signal generated by the first current generating circuitry, and provides the bias current, during a second time period, after the first time period, in response to a second signal generated by the second current generating circuitry.
MULTI-SEGMENT FET GATE ENHANCEMENT DETECTION
In examples, an apparatus includes a FET, first and second voltage-to-current circuits, a current selection circuit, and a comparator. The FET has first and second segments. The first segment has a first gate coupled to the first voltage-to-current circuit, a first source, and a first drain. The second segment has a second gate coupled to the second voltage-to-current circuit, a second source coupled to the first source, and a second drain coupled to the first drain. The current selection circuit has a current selection circuit output and first and second current selection inputs. The first current selection circuit input is coupled to the first voltage-to-current circuit. The second current selection circuit input is coupled to the second voltage-to-current circuit. The comparator has a comparator output and first and second comparator inputs, the first comparator input is coupled to the current selection circuit output.
METHOD AND APPARATUS FOR SUPPLYING VOLTAGE TO AMPLIFIER USING MULTIPLE LINEAR REGULATORS
An example electronic device includes an antenna; a switching regulator; a communication chip including an amplifier, a first linear regulator operably connected to the amplifier and the switching regulator and configured to be supplied with a first voltage from the switching regulator, and a second linear regulator operably connected to the amplifier and the switching regulator and configured to be supplied with a second voltage higher than the first voltage from the switching regulator, the communication chip configured to transmit a radio-frequency signal outside of the electronic device through the antenna; and a control circuit. The control circuit is configured to produce an envelope of an input signal input to the amplifier in connection with the radio-frequency signal and to provide the produced envelope to at least one of the first linear regulator or the second linear regulator. The first linear regulator is configured to provide a third voltage corresponding to the envelope to the amplifier using the first voltage based on the envelope having a voltage in a first range. The second linear regulator is configured to provide a fourth voltage higher than the third voltage to the amplifier using the second voltage based on the voltage of the envelope being in a second range including values larger than values included in the first range.
METHOD AND APPARATUS FOR SUPPLYING VOLTAGE TO AMPLIFIER USING MULTIPLE LINEAR REGULATORS
An example electronic device includes an antenna; a switching regulator; a communication chip including an amplifier, a first linear regulator operably connected to the amplifier and the switching regulator and configured to be supplied with a first voltage from the switching regulator, and a second linear regulator operably connected to the amplifier and the switching regulator and configured to be supplied with a second voltage higher than the first voltage from the switching regulator, the communication chip configured to transmit a radio-frequency signal outside of the electronic device through the antenna; and a control circuit. The control circuit is configured to produce an envelope of an input signal input to the amplifier in connection with the radio-frequency signal and to provide the produced envelope to at least one of the first linear regulator or the second linear regulator. The first linear regulator is configured to provide a third voltage corresponding to the envelope to the amplifier using the first voltage based on the envelope having a voltage in a first range. The second linear regulator is configured to provide a fourth voltage higher than the third voltage to the amplifier using the second voltage based on the voltage of the envelope being in a second range including values larger than values included in the first range.
VOLTAGE REGULATION CIRCUIT, DEVICE, AND METHOD
A voltage regulation circuit, device, and method are disclosed, which relate to the field of electronic technologies, to reduce a voltage regulation time, and improve a system response and user experience. The voltage regulation circuit (1) includes: a first power supply circuit (11), configured to receive a voltage setting signal (S.sub.SET), and output a first supply voltage (V1) and a second reference voltage (V.sub.REF2) according to the voltage setting signal (S.sub.SET) and a difference between a first feedback voltage (V.sub.F1) and a second feedback voltage (V.sub.F2), where the first feedback voltage (V.sub.F1) is used to indicate the first supply voltage (V1), and the second feedback voltage (V.sub.F2) is used to indicate a second supply voltage (V2); and a second power supply circuit (12), configured to output the second supply voltage (V2) based on the second reference voltage (V.sub.REF2).
LOW-DROPOUT VOLTAGE REGULATOR
A low-dropout voltage regulator is provided. The low-dropout voltage regulator includes a differential amplifier pair, a secondary amplification circuit that is self-stabilized, an output circuit, and a frequency compensation circuit. The secondary amplification circuit includes a first amplification transistor and a second amplification transistor. The first amplification transistor includes a first terminal, a second terminal, and a third terminal. The second amplification transistor includes a first terminal, a second terminal, and a third terminal. The second terminal of the first amplification transistor is electrically connected to the second terminal of the second amplification transistor to form an input terminal of the secondary amplification circuit to be connected to an output terminal of the differential amplifier pair. The frequency compensation circuit is disposed between an output terminal of the secondary amplification circuit, a second terminal of an output transistor, and a third terminal of the output transistor.
Smart card
A smart card with improved power stability is provided. The smart card comprises a rectification signal line through which a rectification signal extracted from a radio frequency (RF) signal is provided; a regulator configured to regulate a voltage of the rectification signal line to a first voltage; a power circuit configured to extract a power component from the rectification signal using an output of the regulator; a logic circuit configured to receive the power component and generate a reception enable signal on the basis of the power component; a demodulator which is enabled by the reception enable signal provided from the logic circuit and configured to extract a signal component from the rectification signal; a capacitor controller which is enabled by the reception enable signal provided from the logic circuit and configured to generate a capacitor enable signal; and a capacitor circuit which is connected to the rectification signal line and has capacitance changed according to the capacitor enable signal.
Smart card
A smart card with improved power stability is provided. The smart card comprises a rectification signal line through which a rectification signal extracted from a radio frequency (RF) signal is provided; a regulator configured to regulate a voltage of the rectification signal line to a first voltage; a power circuit configured to extract a power component from the rectification signal using an output of the regulator; a logic circuit configured to receive the power component and generate a reception enable signal on the basis of the power component; a demodulator which is enabled by the reception enable signal provided from the logic circuit and configured to extract a signal component from the rectification signal; a capacitor controller which is enabled by the reception enable signal provided from the logic circuit and configured to generate a capacitor enable signal; and a capacitor circuit which is connected to the rectification signal line and has capacitance changed according to the capacitor enable signal.
Semiconductor integrated circuit for a regulator for forming a low current consumption type DC power supply device
Disclosed is a semiconductor integrated circuit for a regulator for forming a low current consumption type DC power supply device. The semiconductor integrated circuit includes an output transistor, a control circuit, an operation control transistor and a soft start circuit. The output transistor is connected between an output terminal and a voltage input terminal to which a DC voltage is input. The control circuit controls the output transistor according to a feedback voltage of an output. The operation control transistor controls an operation state of the control circuit. The soft start circuit gradually changes a voltage applied to a control terminal of the operation control transistor and delays activation of the control circuit at a time of applying a power supply voltage to the voltage input terminal.
Dual loop voltage regulator utilizing gain and phase shaping
A voltage regulator that includes a first amplifier, a second amplifier, a summer, and a transistor is presented. The first amplifier has a first gain and a first frequency bandwidth, and is configured to generate a first voltage output. The second amplifier has a second gain that is lower than the first gain and a second frequency bandwidth that is higher than the first frequency bandwidth, and is configured to generate a second voltage output. The summer is configured to generate a summed voltage output. The transistor is connected to the summer and configured to generate a regulated voltage based on the summed voltage output of the summer.