An electrical power source includes a power converter and either an electrical generator or an electrical energy storage device. Power flow is controlled through control of the power converter based on a voltage source and resistance model of the electrical power source. A power converter for an electrical generator is controlled to synthesize a constant voltage of the voltage source and a variable value of the resistance. The resistance value is controlled to deliver a maximum available output power to the electrical microgrid over a range of microgrid voltages up to a voltage below a maximum allowable voltage of the electrical microgrid. For an electrical energy storage device, the power converter is controlled to synthesize a resistance value of the resistance that is dependent upon a phase angle between the voltage at the microgrid side of the electrical power source and current of the electrical energy storage device.

An electrical power source includes a power converter and either an electrical generator or an electrical energy storage device. Power flow is controlled through control of the power converter based on a voltage source and resistance model of the electrical power source. A power converter for an electrical generator is controlled to synthesize a constant voltage of the voltage source and a variable value of the resistance. The resistance value is controlled to deliver a maximum available output power to the electrical microgrid over a range of microgrid voltages up to a voltage below a maximum allowable voltage of the electrical microgrid. For an electrical energy storage device, the power converter is controlled to synthesize a resistance value of the resistance that is dependent upon a phase angle between the voltage at the microgrid side of the electrical power source and current of the electrical energy storage device.

A band-gap reference circuit including: mirror current branch circuits, band-gap paths, and an operational amplifier. Each mirror current branch circuit includes a mirror PMOS transistor and an auxiliary PMOS transistor. A drain of each mirror PMOS transistor is connected with a source of a corresponding auxiliary PMOS transistor, and a drain of said each auxiliary PMOS transistor is connected to a top end of a corresponding band-gap path, each gate of each mirror PMOS transistor is connected with an output port of the operational amplifier. A gate of each auxiliary PMOS transistor is connected to a first bias voltage. A substrate electrode of each mirror and auxiliary transistor is all connected to a source voltage. The output port of the operational amplifier outputs a high level less than the source voltage, the first bias voltage is less than an output voltage signal of the operational amplifier.

A band-gap reference circuit including: mirror current branch circuits, band-gap paths, and an operational amplifier. Each mirror current branch circuit includes a mirror PMOS transistor and an auxiliary PMOS transistor. A drain of each mirror PMOS transistor is connected with a source of a corresponding auxiliary PMOS transistor, and a drain of said each auxiliary PMOS transistor is connected to a top end of a corresponding band-gap path, each gate of each mirror PMOS transistor is connected with an output port of the operational amplifier. A gate of each auxiliary PMOS transistor is connected to a first bias voltage. A substrate electrode of each mirror and auxiliary transistor is all connected to a source voltage. The output port of the operational amplifier outputs a high level less than the source voltage, the first bias voltage is less than an output voltage signal of the operational amplifier.

An electrical system includes an input node electrically connectable to a power supply. The system includes a plurality of voltage suppressors, with at least one of the voltage suppressors electrically connected to the input node. A voltage selection switch is electrically connected to at least one of the plurality of voltage suppressors. A controller in communication with the switch may selectively operate the switch based on a nominal operating voltage at the input node.

An electrical system includes an input node electrically connectable to a power supply. The system includes a plurality of voltage suppressors, with at least one of the voltage suppressors electrically connected to the input node. A voltage selection switch is electrically connected to at least one of the plurality of voltage suppressors. A controller in communication with the switch may selectively operate the switch based on a nominal operating voltage at the input node.

An uninterruptible power supply (UPS) system (100) comprises a plurality of UPS units (UPS-1, UPS-2) connected in parallel. The controllers (130) of the units are programmed to implement a voltage calibration procedure and a current calibration procedure, in order that measurements of voltage and current made by sensors within the different units will agree. In the current calibration procedure, the load is disconnected (302) while one of the units is selected as a master and operates in a voltage control mode (VCM) (Steps 304-308). Each other unit is selected in turn and operated in a current control mode (310, 312). Current measurements made in the master unit are communicated (314) via a data bus to the selected unit and compared (316) with measurements made in the unit itself. The unit adapts its current sensing gains to match the master unit.

An uninterruptible power supply (UPS) system (100) comprises a plurality of UPS units (UPS-1, UPS-2) connected in parallel. The controllers (130) of the units are programmed to implement a voltage calibration procedure and a current calibration procedure, in order that measurements of voltage and current made by sensors within the different units will agree. In the current calibration procedure, the load is disconnected (302) while one of the units is selected as a master and operates in a voltage control mode (VCM) (Steps 304-308). Each other unit is selected in turn and operated in a current control mode (310, 312). Current measurements made in the master unit are communicated (314) via a data bus to the selected unit and compared (316) with measurements made in the unit itself. The unit adapts its current sensing gains to match the master unit.

Disclosed herein are methods for detecting and correcting a fault induced delayed voltage recovery event in an electric power transmission and distribution system. In some embodiments, a fault detection subsystem may receive an indication of a fault in the electric power transmission and distribution system. The system may also include a load analysis subsystem to analyze a plurality of loads supplied by the electric power system and to generate an estimated response of the loads. A fault analysis subsystem may analyze a plurality of factors relating to the fault and to determine a probability of the fault generating a fault induced delayed voltage recovery event. A control system may then implement a control strategy within a control window following the fault based on the probability of the fault generating a fault induced delayed voltage recovery event and the estimated response of the at least one load.

Disclosed herein are methods for detecting and correcting a fault induced delayed voltage recovery event in an electric power transmission and distribution system. In some embodiments, a fault detection subsystem may receive an indication of a fault in the electric power transmission and distribution system. The system may also include a load analysis subsystem to analyze a plurality of loads supplied by the electric power system and to generate an estimated response of the loads. A fault analysis subsystem may analyze a plurality of factors relating to the fault and to determine a probability of the fault generating a fault induced delayed voltage recovery event. A control system may then implement a control strategy within a control window following the fault based on the probability of the fault generating a fault induced delayed voltage recovery event and the estimated response of the at least one load.