Patent classifications
G06E1/04
VARIABLE ISA VECTOR-BASED COMPACTION IN DISTRIBUTED TRAINING OF NEURAL NETWORKS
Using a processor and a memory at a worker machine, a gradient vector is computed corresponding to a set of weights associated with a set of nodes of a neural network instance being trained in the worker machine. In an ISA vector corresponding to the gradient vector, an ISA instruction is constructed corresponding to a gradient in a set of gradients in the gradient vector, wherein a data transmission of the ISA instruction is smaller as compared to a data transmission of the gradient. The ISA vector is transmitted from the worker machine to a parameter server, the ISA vector being responsive to one iteration of a training of the neural network instance, the ISA vector being transmitted instead of the gradient vector to reduce an amount of data transmitted from the worker machine to the parameter server for the one iteration of the training.
OPTOELECTRONIC COMPUTING SYSTEMS
Systems and methods that include: providing input information in an electronic format; converting at least a part of the electronic input information into an optical input vector; optically transforming the optical input vector into an optical output vector based on an optical matrix multiplication; converting the optical output vector into an electronic format; and electronically applying a non-linear transformation to the electronically converted optical output vector to provide output information in an electronic format.
In some examples, a set of multiple input values are encoded on respective optical signals carried by optical waveguides. For each of at least two subsets of one or more optical signals, a corresponding set of one or more copying modules splits the subset of one or more optical signals into two or more copies of the optical signals. For each of at least two copies of a first subset of one or more optical signals, a corresponding multiplication module multiplies the one or more optical signals of the first subset by one or more matrix element values using optical amplitude modulation. For results of two or more of the multiplication modules, a summation module produces an electrical signal that represents a sum of the results of the two or more of the multiplication modules.
ARITHMETIC-LOGICAL UNIT WITH SYNCHRONIZED LASER(S)
An optical arithmetic-logical unit [ALU] processes one or more combined input signals, which result from a combination of multiple elementary input signals, each of which comprises at least one polarization component. One of the combined input signals is a synchronization signal having a phase and an amplitude. At least one laser has an output and is configured to synchronize with the synchronization signal, wherein the synchronization of the laser with the synchronization input signal generates an output signal, which preserves the phase of the synchronization signal but normalizes its amplitude. Generation of the output signal by said normalization of the synchronization signal provides the ALU with a capability of performing one or more arithmetic-logical operations on the one or more combined input signals.
ARITHMETIC-LOGICAL UNIT WITH SYNCHRONIZED LASER(S)
An optical arithmetic-logical unit [ALU] processes one or more combined input signals, which result from a combination of multiple elementary input signals, each of which comprises at least one polarization component. One of the combined input signals is a synchronization signal having a phase and an amplitude. At least one laser has an output and is configured to synchronize with the synchronization signal, wherein the synchronization of the laser with the synchronization input signal generates an output signal, which preserves the phase of the synchronization signal but normalizes its amplitude. Generation of the output signal by said normalization of the synchronization signal provides the ALU with a capability of performing one or more arithmetic-logical operations on the one or more combined input signals.
HARDWARE NODE HAVING A MIXED-SIGNAL MATRIX VECTOR UNIT
Processors and methods for neural network processing are provided. A method in a processor including a matrix vector unit is provided. The method includes receiving vector data and actuation vector data corresponding to at least one layer of a neural network model for processing using the matrix vector unit, where each of digital values corresponding to the vector data and the actuation vector data is represented in a sign magnitude format. The method further includes converting each of the digital values corresponding to at least one of the vector data or the actuation vector data to corresponding analog values and multiplying the vector data and the actuation vector data in an analog domain and providing corresponding multiplication results in a digital domain.
Optoelectronic computing systems
Systems and methods that include: providing input information in an electronic format; converting at least a part of the electronic input information into an optical input vector; optically transforming the optical input vector into an optical output vector based on an optical matrix multiplication; converting the optical output vector into an electronic format; and electronically applying a non-linear transformation to the electronically converted optical output vector to provide output information in an electronic format. In some examples, a set of multiple input values are encoded on respective optical signals carried by optical waveguides. For each of at least two subsets of one or more optical signals, a corresponding set of one or more copying modules splits the subset of one or more optical signals into two or more copies of the optical signals. For each of at least two copies of a first subset of one or more optical signals, a corresponding multiplication module multiplies the one or more optical signals of the first subset by one or more matrix element values using optical amplitude modulation. For results of two or more of the multiplication modules, a summation module produces an electrical signal that represents a sum of the results of the two or more of the multiplication modules.
Integrated computational elements containing a quantum dot array and methods for use thereof
Integrated computational elements having alternating layers of materials may be problematic to configure toward mimicking some regression vectors. Further, they sometimes may be inconvenient to use within highly confined locales. Integrated computational elements containing a quantum dot array may address these issues. Optical analysis tools with an integrated computational element can comprise: an electromagnetic radiation source that provides electromagnetic radiation to an optical pathway; an integrated computational element positioned within the optical pathway, the integrated computational element comprising a quantum dot array having a plurality of quantum dots disposed at a plurality of set array positions; and a detector that receives the electromagnetic radiation from the optical pathway after the electromagnetic radiation has optically interacted with a sample and the integrated computational element. Optical interaction of electromagnetic radiation with the quantum dots at one or more set array positions can substantially mimic a regression vector for a sample characteristic.
MATRIX MULTIPLICATION USING OPTICAL PROCESSING
Systems and methods for performing matrix operations using a photonic processor are provided. The photonic processor includes encoders configured to encode a numerical value into an optical signal and optical multiplication devices configured to output an electrical signal proportional to a product of one or more encoded values. The optical multiplication devices include a first input waveguide, a second input waveguide, a coupler circuit coupled to the first input waveguide and the second input waveguide, a first detector and a second detector coupled to the coupler circuit, and a circuit coupled to the first detector and second detector and configured to output a current that is proportional to a product of a first input value and a second input value.
CYPHER SYSTEM, CYPHER APPARATUS, CYPHER METHOD, AND PROGRAM
A cypher system includes a plurality of hardware computers, each hardware computer including a photoelectric fusion processor that includes at least one of (i) a Y gate circuit configured to combine optical signals, (ii) an optical switching circuit configured to switch optical signal paths based on electrical signals, or (iii) a phase modulator configured to modulate a phase of an optical signal. The photoelectric fusion processor is configured to perform optical operation processing and perform an encryption operation including an exclusive OR operation in which two or more bit values are given as inputs, and a nonlinear operation in which two or more bit values are given as inputs.
CYPHER SYSTEM, CYPHER APPARATUS, CYPHER METHOD, AND PROGRAM
A cypher system includes a plurality of hardware computers, each hardware computer including a photoelectric fusion processor that includes at least one of (i) a Y gate circuit configured to combine optical signals, (ii) an optical switching circuit configured to switch optical signal paths based on electrical signals, or (iii) a phase modulator configured to modulate a phase of an optical signal. The photoelectric fusion processor is configured to perform optical operation processing and perform an encryption operation including an exclusive OR operation in which two or more bit values are given as inputs, and a nonlinear operation in which two or more bit values are given as inputs.