G06F1/14

Asynchronous distributed coordination and consensus with threshold logical clocks

Consensus protocols for asynchronous networks are usually complex and inefficient, leading practical systems to rely on synchronous protocols. The invention proposes an approach to simplify asynchronous consensus by building it atop a novel threshold logical clock abstraction, allowing the consensus protocol to operate in “virtual synchrony.” Leveraging accountable state machine techniques to detect and suppress Byzantine nodes, and verifiable secret sharing for random leader election, we obtain simple and efficient protocols for asynchronous Byzantine consensus.

Asynchronous distributed coordination and consensus with threshold logical clocks

Consensus protocols for asynchronous networks are usually complex and inefficient, leading practical systems to rely on synchronous protocols. The invention proposes an approach to simplify asynchronous consensus by building it atop a novel threshold logical clock abstraction, allowing the consensus protocol to operate in “virtual synchrony.” Leveraging accountable state machine techniques to detect and suppress Byzantine nodes, and verifiable secret sharing for random leader election, we obtain simple and efficient protocols for asynchronous Byzantine consensus.

SYSTEM AND METHOD FOR MANAGING A POWER SUPPLY MANAGEMENT NAMESPACE DURING A CHASSIS BOOT UP
20230031359 · 2023-02-02 ·

A method for managing a chassis includes obtaining, by an enclosure controller of the chassis, a power supply application to the chassis using a power supply interface, wherein the power supply interface is operatively connected to a plurality of power supplies, initiating a boot-up of a kernel of the chassis in response to the power supply application, initiating a parallel boot task using the power supply management temporary namespace to identify a power supply of the plurality of power supplies, initiating a mounting of a boot-up file system, and initiating a user space boot-up using the boot-up file system, wherein the user space boot-up and the parallel boot task are initiated in parallel.

SYSTEM AND METHOD FOR MANAGING A POWER SUPPLY MANAGEMENT NAMESPACE DURING A CHASSIS BOOT UP
20230031359 · 2023-02-02 ·

A method for managing a chassis includes obtaining, by an enclosure controller of the chassis, a power supply application to the chassis using a power supply interface, wherein the power supply interface is operatively connected to a plurality of power supplies, initiating a boot-up of a kernel of the chassis in response to the power supply application, initiating a parallel boot task using the power supply management temporary namespace to identify a power supply of the plurality of power supplies, initiating a mounting of a boot-up file system, and initiating a user space boot-up using the boot-up file system, wherein the user space boot-up and the parallel boot task are initiated in parallel.

PLATFORMS INTEGRATION SYSTEM
20230031675 · 2023-02-02 ·

A method includes receiving an order request associated with a user and a first physical product, adding the order request to a list of order requests, and causing a first graphical user interface (GUI) to display a livestream video and the list of order requests. Responsive to receiving user selection of the order request from the list of order requests, the method further includes generating a timestamp associated with the user selection, and causing the first GUI to be updated to indicate the first physical product associated with the order request is being shown via the livestream.

Method for synchronizing and locking clocks

Method and apparatus for synchronizing and locking clocks identifies entangled pairs of photons by comparing a first and second list of measured state values of single photons, wherein the first list is compiled by photon arrival times measured using a first clock and the second list is compiled by photon arrival times measured using a second clock. Entangled pairs of photons are identified by a match of the measured state values of single photons in their respective lists. Elapsed times of the first and second clocks are determined by taking the difference between arrival times of respective identified entangled pairs of photons measured using their respective clocks. A rate of one of the first and second clocks is changed based on a difference between the elapsed times, thereby synchronizing the first and second clocks. Clocks are locked by repeating.

LOW COMPLEXITY ETHERNET NODE (LEN) ONE PORT
20220350773 · 2022-11-03 ·

A network interface module for coupling a host device to a switched network as a network node is described. The network interface module comprises a single half-duplex port for communicatively coupling to a shared bus of the switched network, at least one frame queue sized to store one multicast read frame received via the shared bus, and logic circuitry. The logic circuitry is configured to decode a read command for the interface module included in a payload of the multicast read frame that includes multiple read commands for other network nodes of the switched network, and transmit a response frame including read data on the shared bus when detecting the shared bus is available for transmitting.

Precise Time Management for Peripheral Device Using Local Time Base

An apparatus for time management of a peripheral device is disclosed. A peripheral interface circuit receives information from a host circuit over a peripheral bus, the host circuit maintaining a global timebase in accordance with a first clock signal within a first clock domain. The peripheral interface circuit maintains, based om a second clock signal within a second clock domain, a first local timebase correlated to the global timebase. A peripheral control circuit operates in a third clock domain and maintains a second local timebase based on the first. The peripheral interface circuit determines phase and frequency differences between the second and third clock signals in determining a correlation between the second and first local timebases. A peripheral logic circuit in the third clock domain performs, operations that utilize a timestamp from the second local timebase, which accounts for correlation with the first local timebase.

CLOCK CALIBRATION IN A COMPUTING SYSTEM USING TEMPERATURE SENSORS
20230089659 · 2023-03-23 ·

Described herein are systems, methods, and software to manage time calibration associated with an oscillator of a computing system. In one example, a computing system monitors clock cycles for an oscillator on the computing system, receives timing messages from a server, and calculates the frequency of the oscillator at intervals based on the monitored clock cycles and timing messages. The computing system further identifies a temperature from a temperature sensor at each of the intervals and generates a function to demonstrate frequency of the oscillator versus temperatures from the temperature sensor based on the identified temperatures and frequencies at the intervals.

CLOCK CALIBRATION IN A COMPUTING SYSTEM USING TEMPERATURE SENSORS
20230089659 · 2023-03-23 ·

Described herein are systems, methods, and software to manage time calibration associated with an oscillator of a computing system. In one example, a computing system monitors clock cycles for an oscillator on the computing system, receives timing messages from a server, and calculates the frequency of the oscillator at intervals based on the monitored clock cycles and timing messages. The computing system further identifies a temperature from a temperature sensor at each of the intervals and generates a function to demonstrate frequency of the oscillator versus temperatures from the temperature sensor based on the identified temperatures and frequencies at the intervals.